Commit Graph

19700 Commits

Author SHA1 Message Date
Andres Sanchez
64687e438a boards/stm32h7: add support for mcuboot
Add support for MCUBoot.
Two new configurations are added:
- mcuboot-loader: mcuboot-loader app used as a bootloader.
main_mcuboot_loader as entrypoint
- mcuboot-app: used as mcuboot agent app. Needs to be
signed manually through "imgtool sign --pad  --align 4 -v 0 -s
auto -H 0x200 --pad-header -S 0xc0000 nuttx.hex nuttx_sign.bin"

Signed-off-by: Andres Sanchez <tito97_sp@hotmail.com>
2022-09-16 02:12:17 +08:00
Michal Lenc
7d877fbbc3 imxrt: add support for PWM synchronization
This commit allows the PWM modules to be synchronized by an external
signal (other PWM module for example). The sync source can be selected
from configuration.

PWM module can also now generate a trigger when its timer reaches the duty
cycle. This trigger is used for the synchronization of other modules. It
can also be used for triggering ADC for example in the future.

Thanks to Rastislav Pavlanin and  Jan Spurek from NXP support for
suggestion which helped to solve the inter-module PWM synchronization
task.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-09-15 08:10:26 +09:00
Eero Nurkkala
ec026c14cb risc-v/mpfs: emmcsd: further enhance the clocking
Simplify the clock mode from the board.h -files. Also make the
SD clock definable as well.

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-09-15 01:55:33 +08:00
Ville Juven
ea9144bda8 mpfs/mpfs_ddr.c: Stop the DDR training once it is completed
The DDR training IP stays active otherwise, so stop it when the training
is complete.

This fixes a potential interrupt storm via MPFS_IRQ_DDRC_TRAIN.
2022-09-14 22:31:36 +08:00
ligd
bedd5d382d armv7-a: icache also need SMP cache coherency configuration
This can fixes the random crash happened sometime during boot.

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-13 17:59:41 +08:00
Eero Nurkkala
e5305a250a risc-v/mpfs: emmcsd: provide options for selecting clk speed
Some related products, such as Aries m100pfs, don't support eMMC
speeds up to 200MHz. Thus, provide option to select slower clock.
This has only to do with the clocking, no CMD6 is sent to select
high speed modes.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-09-13 11:23:45 +08:00
Ville Juven
ff05cc593f risc-v/mmu: Fix L3 mappings for kernel, and mpfs protected mode userspace
The L3 mapping function was just way too simplistic. Depending on memory
configuration it either works or not.

Noticed that with icicle:pnsh the software crashes due to instruction
page fault, reason is the map_region() implementation that does not
work for regions that are not aligned to 2MB (the L2 page size).

Implemented an extremely simplistic page table allocator for the L3
references, that should once and for all get rid of the L3 mapping issue.

NOTE: gran_alloc() cannot be used at this point, it is too early for it.
2022-09-12 18:01:08 +09:00
zhangyuan21
3b889d820f armv7-a/r: use SRS and RFE for exception handler 2022-09-11 10:50:37 +09:00
liangchaozhong
62cbd72149 remove access on /dev/usrsock in up_usrsock.c
Signed-off-by: liangchaozhong <liangchaozhong@xiaomi.com>
2022-09-10 13:08:22 +08:00
ligd
3a023f4d1a arm: fix backtrace busyloop
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-10 12:48:11 +08:00
ligd
b3ebe66ff5 arch: dump backtrace should after set rtcb regs
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-10 12:48:11 +08:00
ligd
a3f9bd3786 backtrace: fix busy loop backtrace
Situation:
1. user call assert
2. crash in assert
3. crash happend, do backtrace
4. backtrace interrupt stack successful
5. busy loop backtrace user stack with CURRENT_REGS

Fix:
use rtcb->regs instead

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-10 12:48:11 +08:00
ligd
37d37dcae5 armv7-a/r: use generic timer to realize arm_timer
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-09 21:52:35 +02:00
ligd
4c19130d1d cache: fix up_clean_dcache() slowly
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-09 21:51:35 +02:00
Eero Nurkkala
945e531eaf risc-v/mpfs: emmcsd: allow switching from SD to eMMC
If the system starts up using the SD-card, and later wants
to switch to use the eMMC, it's not going to happen. SD-card
will be kept selected within the FPGA making the transition
fail.

It's been possible to switch from eMMC to SD, but now the
transition is possible for both directions.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-09-09 21:40:35 +08:00
Victor Benso
2892f18f15 Fix some register's values, enable TWAI extended registers and add a missing prototype.
Also, replaced critical_sections with spinlocks.
2022-09-09 15:30:35 +08:00
GD32-MCU
85c8144afa add chip GD32F450 of GD32MCU
Modify the file according to the checks

update the board config files, and modify the gd32f4xx_progmem.c

Add chip GD32F450 of GD32MCU

delete the micro FAR, modify code style

Add chip GD32F450 of GD32MCU
2022-09-09 15:29:35 +08:00
curuvar
e8f4d74ad0 RP2040 Code Cleanup 2022-09-09 12:43:40 +08:00
Eero Nurkkala
5cedf1ef2a risc-v/mpfs: usb: fix usb restart
Issuing the following commands doesn't succeed:
  - conn
  - disconn
  - conn
This USB driver doesn't even disconnect without this patch.

If the USB driver has been started from another hart, closing it
will not disable the PLIC interrupt. This means it's possible many
harts get the USB interrupt and thus make the USB look very unstable.

Fix these problems by disconnecting the USB via the USB_POWER
register at shutdown and disabling the interrupt at shutdown. Also
clear the software internals via the mpfs_sw_setup() for the conn /
disconect loop to succeed.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-09-08 22:08:17 +08:00
curuvar
0322a61510 Add watchdog driver support to RP2040 2022-09-08 21:41:13 +08:00
curuvar
05b19e02d9 Eliminate un-needed wait in rp2040 SMART filesystem 2022-09-08 09:00:52 +08:00
curuvar
d3b226aea1 Fix race condition in RaspberryPi Pico W WiFi 2022-09-08 09:00:33 +08:00
Xiang Xiao
e17b678a16 compiler.h: Rename inline_function to always_inline_function
reserve inline_function macro for inline keyword

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-07 10:24:04 +02:00
ligd
94cf99f310 sim: fix signal crash in SMP mode
reproduce:
sim:smp
ostest

reason:
shouldn't do sim_sigdeliver() in irq handler

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-09-07 09:33:36 +09:00
Sebastien Lorquet
179d64d999 stm32h7: SPI is no more experimental 2022-09-06 19:34:40 -04:00
Sebastien Lorquet
3e16b6c9f1 update conditionals to select stm32h7 spi peripherals 2022-09-06 19:34:40 -04:00
Eero Nurkkala
4df8b16060 risc-v/mpfs: usb: provide more endpoints
The underlying hardware supports 9 endpoints:
  - EP0
  - 4x IN EPs
  - 4x OUT EPs

Currently the driver assumes every EP number is unique. This limits
the amount of EPs to 1 + 4 = 5. Utilize the EPs in such a manner
that all may be used.

Also fix a few error handling related bugs. Update the composite
driver to match the current situation as well.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-09-06 23:10:30 +08:00
curuvar
9ad75fd95d Added SMART flash filesystem to RP2040 2022-09-05 10:38:56 -03:00
Michal Lenc
23b27419e2 imxrt/encoder: add support for index position capture
This commit enhances imxrt encoder driver with index capture support.
The index is captured when the index interrupt occurs and can be passed
to application layer with QEIOC_GETINDEX ioctl call.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2022-09-04 11:08:45 +08:00
Gustavo Henrique Nihei
c5785ee9d5 risc-v/esp32c3: Fix some UBSAN shift-out-of-bounds warnings
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-09-03 00:29:02 +08:00
Gustavo Henrique Nihei
a5b006a891 xtensa: Avoid including handlers when no coprocessor is available
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-09-02 23:43:16 +08:00
Huang Qi
32a21a1b67 UBSan: Allow custom the sanitizer in Kconfig
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-09-02 19:07:09 +08:00
Rajvinder Kaur
27fbca771f stm32h7\stm32_fdcan_sock: fix the FDCAN_LOOPBACK config macros 2022-09-02 10:42:08 +08:00
wangbowen6
b15d38246c up_nputs: fix AddressSanitizer: global-buffer-overflow problem
==2117790==ERROR: AddressSanitizer: global-buffer-overflow on address 0x64d9e3c0 at pc 0x59ac4e16 bp 0xcefe8058 sp 0xcefe8048
READ of size 1 at 0x64d9e3c0 thread T0
    #0 0x59ac4e15 in up_nputs sim/up_nputs.c:54
    #1 0x59a67e4c in syslog_default_write syslog/syslog_channel.c:220
    #2 0x59a67823 in syslog_default_write syslog/syslog_write.c:101
    #3 0x59a67f10 in syslog_write syslog/syslog_write.c:153
    #4 0x59a651c3 in syslogstream_flush syslog/syslog_stream.c:60
    #5 0x59a6564e in syslogstream_addchar syslog/syslog_stream.c:104
    #6 0x59a6576f in syslogstream_putc syslog/syslog_stream.c:140
    #7 0x5989fc4d in vsprintf_internal stdio/lib_libvsprintf.c:952
    #8 0x598a1298 in lib_vsprintf stdio/lib_libvsprintf.c:1379
    #9 0x59a64ea4 in nx_vsyslog syslog/vsyslog.c:223
    #10 0x598a601a in vsyslog syslog/lib_syslog.c:68
    #11 0x59b0e3dc in AIOTJS::logPrintf(int, char const*, ...) src/ajs_log.cpp:45
    #12 0x59b03d56 in jse_dump_obj src/jse/quickjs/jse_quickjs.cpp:569
    #13 0x59b03ea1 in jse_dump_error1(JSContext*, unsigned long long) src/jse/quickjs/jse_quickjs.cpp:602
    #14 0x59b03dd9 in jse_dump_error(JSContext*) src/jse/quickjs/jse_quickjs.cpp:591
    #15 0x59bed615 in ferry::DomComponent::callHook(char const*) src/framework/dom/component.cpp:65
    #16 0x59bfe0ff in ferry::DomComponent::initialize() src/framework/dom/component.cpp:645
    #17 0x59bb141d in dom_create_component(JSContext*, unsigned long long, unsigned long long, unsigned long long) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x365c41d)
    #18 0x59b4c0d3 in AIOTJS::__createComponent(JSContext*, unsigned long long, int, unsigned long long*) (/home/wangbowen/project/central/vela_miot_bes_m0/bin/audio+0x35f70d3)
    #19 0x5a56ec17 in js_call_c_function quickjs/quickjs.c:16108

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2022-09-01 11:51:48 +08:00
zhangyuan21
c82798c66a arch/arm: change context switch to macro 2022-08-31 10:57:38 -04:00
Masayuki Ishikawa
b7063427c8 arch: risc-v: Fix up_check_tcbstack() for CONFIG_ARCH_ADDRENV=y
Summary:
- I noticed that ps shows incorrect stack usage when running
  getprime in the background.
- With CONFIG_ARCH_ADDRENV=y, a user task including pthread
  allocates its stack in the user space that needs to be
  accessed with a correct address environment.
- This commit fixes this issue.

Impact:
- CONFIG_ARCH_ADDRENV=y only

Testing:
- Tested with rv-virt:knsh64 on qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-31 09:20:36 +08:00
Masayuki Ishikawa
e2f0f431d9 arch: risc-v: Assign dedicated virtual addresses for text and heap
Summary:
- Current RISC-V/NuttX implementation assumes that text/data/heap
  areas are continuous. In fact, CONFIG_ARCH_TEXT_VBASE and
  CONFIG_ARCH_HEAP_VBASE are not used for memory allocation.
- This commit assigns dedicated virtual addresses for text and heap
  which are the same approach to ARM-v7A/NuttX implementation.

Impact:
- None

Testing:
- Tested with rv-virt:knsh64 (will be updated later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-30 22:52:01 +08:00
Huang Qi
f93964ad3c riscv: Dump trap val in exception handler
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-08-30 14:55:33 +08:00
Eero Nurkkala
3665180795 risc-v/mpfs: usb: fix cppcheck findings
Fix the following cppcheck findings. Privreq may be NULL,
thus perform checks before using its member variables.

Checking mpfs_usb.c ...
mpfs_usb.c:1093:12: warning: Possible null pointer dereference: privreq [nullPointer]
      if ((privreq->inflight > 0) && (count != 0) &&
           ^
mpfs_usb.c:1090:21: note: Assignment 'privreq=NULL', assigned value is 0
          privreq = NULL;
                    ^
mpfs_usb.c:1093:12: note: Null pointer dereference
      if ((privreq->inflight > 0) && (count != 0) &&
           ^
mpfs_usb.c:1138:3: warning: Possible null pointer dereference: privreq [nullPointer]
  privreq->req.xfrd = 0;
  ^
mpfs_usb.c:1130:21: note: Assignment 'privreq=NULL', assigned value is 0
          privreq = NULL;
                    ^
mpfs_usb.c:1138:3: note: Null pointer dereference
  privreq->req.xfrd = 0;
  ^
mpfs_usb.c:1139:3: warning: Possible null pointer dereference: privreq [nullPointer]
  privreq->inflight = privreq->req.len;
  ^
mpfs_usb.c:1130:21: note: Assignment 'privreq=NULL', assigned value is 0
          privreq = NULL;
                    ^
mpfs_usb.c:1139:3: note: Null pointer dereference
  privreq->inflight = privreq->req.len;
  ^
mpfs_usb.c:1140:50: warning: Possible null pointer dereference: privreq [nullPointer]
  priv->eplist[epno].descb[0]->addr = (uintptr_t)privreq->req.buf;
                                                 ^
mpfs_usb.c:1130:21: note: Assignment 'privreq=NULL', assigned value is 0
          privreq = NULL;
                    ^
mpfs_usb.c:1140:50: note: Null pointer dereference
  priv->eplist[epno].descb[0]->addr = (uintptr_t)privreq->req.buf;

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-30 01:41:28 +08:00
Eero Nurkkala
90d9b6b8ac risc-v/mpfs: usb: fix infinite loop issue
mpfs_write_tx_fifo() gets stuck in the following case:
  - CDCACM is used
  - ttyACM0 is opened and then closed from the remote end,
    such as Linux or Windows
  - data is written into ttyACM0 from NuttX
  - tx fifo will never get empty and the system is stuck

Fix this by issuing an error code if the transmit fifo doesn't
proceed as expected. The error code is then propagated into
higher level keeping the system functional.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-29 21:35:54 +08:00
chengkai
b352a625bf arch/sim: add bth4 bridge codes
Signed-off-by: chengkai <chengkai@xiaomi.com>
2022-08-27 22:38:43 +08:00
raiden00pl
d7e2704dff arch/stm32/stm32_adc.c: cosmetics 2022-08-27 20:40:06 +08:00
raiden00pl
b01ea50e44 arch/stm32/stm32_foc.c: cosmetics 2022-08-27 20:40:06 +08:00
raiden00pl
c563d8a993 arch/stm32/stm32_pwm.c: cosmetics 2022-08-27 20:40:06 +08:00
raiden00pl
9a85a0959a stm32/Kconfig: remove the unnecessary option 2022-08-27 20:40:06 +08:00
Gustavo Henrique Nihei
a5fd1140cb arch/xtensa: Remove non-existent ARCH_HAVE_TESTSET support for ESP32-S2
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-27 06:14:57 +02:00
Fotis Panagiotopoulos
4b6d4de972 sim: Added gcov dump on application exit. 2022-08-26 23:58:30 +08:00
yangxuan8282
2d32ebe952 arch/arm/src/stm32f7/stm32_otghost.c: fix syslog formats 2022-08-26 20:46:50 +08:00
Gustavo Henrique Nihei
2fb8af0c20 xtensa: Refactor up_fpucmp to only consider enabled coprocessors
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-26 11:57:06 +08:00
Gustavo Henrique Nihei
fe2d37aa33 xtensa: Fix allocation of FPU registers in exception context
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-26 11:57:06 +08:00
Gustavo Henrique Nihei
5ed2ee85c9 arch: Improve documentation for up_fpucmp function
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-26 11:57:06 +08:00
Gustavo Henrique Nihei
e31e69aa30 xtensa: Fix comparison result for up_fpucmp function
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-26 11:57:06 +08:00
Eero Nurkkala
71ace555f2 risc-v/mpfs: ihc: fix performance issue
nxsig_usleep() will wait for the next timer tick which is way
too much here. It's not sleeping 100 us, but rather, near 1/60 s.

This causes severe performance problems. Fix this by polling the
register for a while if the remote end is busy.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-26 02:12:26 +08:00
chao.an
9cb17841d8 net/sockopt: move BINDTODEVICE to socket level
rename the UDP_BINDTODEVICE to SO_BINDTODEVICE to follow the linux
style to be compatible with non-UDP protocol binding requirements

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-25 17:56:52 +08:00
Masayuki Ishikawa
50177dbae1 arch: common: Fix arm_allocateheap.c for BUILD_KERNEL
Summary:
- I noticed that the kernel heap area overlaps the PGPOOL
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-25 13:38:47 +08:00
Huang Qi
e4e3208180 Replace all strncpy with strlcpy for safety
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-08-25 13:38:36 +08:00
Gustavo Henrique Nihei
96f77cb6a6 xtensa/esp32s3: Fix alignment of FPU registers in exception context
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-25 10:07:25 +08:00
Nathan Hartman
1d622b6f79 arch/tiva: Fix typo and minor code formatting 2022-08-24 21:29:18 +02:00
chao.an
da6d526e9c arch/sim: fix visual studio Linker Tools Error LNK2019
nuttx_all.lib(up_initialstate.obj) : error LNK2019:
  unresolved external symbol '___builtin_frame_addres' referenced in function '_up_getsp'

Return stack pointer from esp

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-24 21:59:07 +08:00
Jukka Laitinen
c7a904fa12 arch/risc-v/src/mpfs: Fixes for MSSIO GPIO configurations
- Clarify the macros MSSIO_EC_DEFAULT and MSSIO_EC_USB_DEFAULT
- Remove PULLDOWN bit from MSSIO_EC_DEFAULT, it was on by accident
- Fix some EC configuration macros; DRVSTR was wrong, clean up the others
- Define GPIO_PULLUP and GPIO_PULLDOWN like on many other platforms

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-08-24 19:25:05 +08:00
chao.an
a93b703994 arch/sim/wchar_t: fix visual studio Compiler Error C2371
type of 'wchar_t' confilt with vcruntime:

C:\Program Files\Microsoft Visual Studio\2022\Community\VC\Tools\MSVC\14.33.31629\include\vcruntime.h(228,28):
  error C2371: 'wchar_t': redefinition; different basic types
D:\code\incubator-nuttx\include\sys/types.h(174): message : see decaration of 'wchar_t'

typedef wchar_t as unsigned char to compatible with vcrtuntime

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-24 16:52:03 +08:00
Eero Nurkkala
d940d55ee4 risc-v/mpfs: ihc: update vq ids
Since the commit cf22dd8 (related to OpenAMP update), the notifyid
is no longer NOTIFY_ALL, but the vq id.

Utilize the vq id now properly as it's being provided. However,
vq id 0 generates action.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-24 02:35:00 +08:00
Xiang Xiao
d22e1e1998 compiler.h: Add nosanitize_address macro
and replace all __attribute__((no_sanitize_address)) with it

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
Xiang Xiao
c44a7cbf88 arch: Add ARCH_COVERAGE_ALL option
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
Xiang Xiao
f1355680ca mm/kasan: Add MM_KASAN_ALL option
so the user could disable the full image instrumentation,
but enable the instrumentation by files or directories.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:50:52 +02:00
Xiang Xiao
f3f1dde39b arch/sim: Assign virtio vring notifyid to RSC_NOTIFY_ID_ANY
let framework allocate the unique id for us instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 17:21:37 +02:00
Xiang Xiao
0334819742 net/usrsock: Change xid from uint64_t to uint32_t
by generating the new xid for each transaction

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-23 12:16:33 -03:00
chao.an
62977ec4e8 arch/sim: add windows host simulate support
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-23 22:04:42 +08:00
chao.an
a10add60ae sim/host: move host implement to posix directory
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-23 22:04:42 +08:00
Xiang Xiao
b60704614e arch/sim: set CMDLINE env to the argument user pass to nuttx
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-22 17:53:29 +03:00
chao.an
eb9cfefc1b sched: fix visual studio compiler error
GCC __attribute__ is not fully compatible with MSVC, In the MSVC
environment the programmer typically explicitly exports function/class
symbols via the MSVC-specific __declspec(dllexport) modifier.

D:\code\incubator-nuttx\arch\sim\src\sim\up_head.c(107,15):
  error C2143: syntax error : missing ')' before '('
  [D:\code\n3\incubator-nuttx\vs2022\up_head.vcxproj]

Reference:
https://docs.microsoft.com/en-us/cpp/cpp/dllexport-dllimport?view=msvc-170

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-22 20:00:42 +08:00
yangxuan8282
8a8c268e6b arch/arm/src/stm32f7/Kconfig: add STM32F7_SYSCFG 2022-08-22 17:31:49 +08:00
yangxuan8282
78f44e7769 arch/arm/src/stm32f7/stm32_otg.h: fix stm32_otghost_initialize definition 2022-08-22 17:31:38 +08:00
Huang Qi
a06ec54cd0 debug: Introduce portion of UBSan
without UBSan
```
 text    data     bss     dec     hex filename
  85612     208  142258  228078   37aee nuttx
```

with UBSan:
```
   text    data     bss     dec     hex filename
 194290   98164  208634  501088   7a560 nuttx
```

```c
int main(int argc, FAR char *argv[])
{
  uint32_t ptr[32];
  printf("Hello, World!! %lu\n", ptr[64]);
  return 0;
}
```
Try to run this sample:
```
nsh> hello
ubsan_prologue: ================================================================================
ubsan_prologue: UBSAN: array-index-out-of-bounds in hello_main.c:39:37
__ubsan_handle_out_of_bounds: index 64 is out of range for type 'uint32_t [32]'
ubsan_epilogue: ================================================================================
Hello, World!! 1070182368
nsh>
```

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-08-22 13:57:29 +08:00
Masanari Iida
49c50d3bf4 arch/ceva: Add missing comma
This patch fixes following error, fond by cppcheck.

up_hardfault.c:103:0: error: failed to expand 'hfdumpreg4',
 Wrong number of parameters for macro 'hfdumpreg4'

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
2022-08-20 16:37:42 +08:00
Masanari Iida
bd584332a4 rp2040: Add missing comma in rp2040_i2c_slave.c
This patch fixes missing comma, found by cppcheck.

rp2040_i2c_slave.c:259:0: error: failed to expand 'modbits_reg32',
 Wrong number of parameters for macro 'modbits_reg32'.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
2022-08-20 16:37:32 +08:00
yangxuan8282
df6e3d1349 arch/arm/src/stm32f7/stm32_otghost.c: fix undeclared ret 2022-08-19 21:02:02 +08:00
Cis van Mierlo
2c42b93962 S32K1xx: Fixed PM bug for clockconfig 2022-08-19 06:01:30 -07:00
Daniel P. Carvalho
7518beee2e STM32L4 ADC: Change the way that hardware trigger configuration word for regular and injected channels are done. 2022-08-18 11:26:25 -03:00
Ville Juven
75ba9001bc risc-v/mpfs: Make entrypoint table run-time configurable
Default values still come from configuration, but this gives the option
to modify the per-hart entrypoints.
2022-08-18 21:50:53 +08:00
Michał Łyszczek
4e967c67b4 stm32wl5: fix unbuffered mode and other possible bugs
This patch fixes unbuffered mode so it actually works.

Also, patch contains fixes for possible bugs that could result in
deadlock or system hang in certain situations.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2022-08-18 11:46:38 +08:00
Michał Łyszczek
cc08ae67cb stm32wl5_pwr: add support to boot second CPU (cortex-m0)
Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2022-08-18 11:46:38 +08:00
curuvar
74f1bfbfd7 Added support for Raspberry Pi Pico W 2022-08-17 19:03:19 -03:00
Eero Nurkkala
a1ff841ca4 risc-v/mpfs: ihc: don't use semaphores with OpenSBI vendor calls
OpenSBI vendor extension calls must not cause scheduling, as they're
part of M-mode trap handling. Thus, comment out nxsig_usleep() as
well, which is occasionally taken and crashes the system in that
case. Fix this by commenting out lines that have the potential to
cause scheduling.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-17 18:33:32 +08:00
raiden00pl
6d1646625a arch/arm/src/stm32f7: port FOC driver from arch/stm32 2022-08-15 13:39:08 +02:00
Xiang Xiao
a02101efff arch/sim: Remove up_smpsignal.o and up_touchscreen.o from REQUIREDOBJS
since it isn't required anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-15 10:41:46 +03:00
Masayuki Ishikawa
548540eb13 arch: qemu-rv: Fix high CPU usage in SMP mode
Summary:
- I noticed that QEMU shows high CPU usage if the number of
  CPUs does not match the kernel configuration. (e.g. -smp 8
  and CONFIG_SMP_NCPUS=2)
- This commit fixes this issue.

Impact:
- qemu-rv only

Testing:
- Tested with the following configs
  - rv-virt:smp64 (CONFIG_NCPUS=1/2/8)
  - rv-virt:nsh64

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-13 22:41:42 +03:00
Tiago Medicci Serrano
ab60d0d3fb Framebuffer's callback buffer starts from the area being drawn.
The commit 664d45dcba updated the
behavior of the framebuffer's putarea callback enabling it to be
used to draw a particular area of the display. Previously, putarea
was only used to draw the entire area of the display. Any different
area was drawn, row by row, by putrun. Also, before checking for
which callback to call, the framebuffer driver adjusted the buffer
reference that was going to be used for calling the driver's callback
to point to the init of the relevant data. After that commit, the
framebuffer's buffer reference passed to the driver's putarea now
contains the data to draw the entire display. Unlike the previous
version of that implementation, only the putrun's callback buffer
was being referenced from the address that contains the data that
actually is being drawn.

This commit fixes it by adjusting the reference for the run buffer
passed to the putrun/putarea callback. It always starts from the
beginning of the relevant data that is actually being drawn. That is
necessary because lcddev (which uses the same LCD display driver
callbacks) actually don't allocate a buffer containing the data to
draw the whole display, so the same putarea implementation of the
LCD drivers would'n be able to work for both lcddev and framebuffer.
Also it's necessary to pass the stride argument to the LCD drivers
in order to enable them to do partial writes by calculating the
buffer offset while sending row-by-row. The stride is equal the
width multiplied by the bytes per pixel (may add some padding)
for framebuffer and is equal to the lenght of the row being drawn
(multiplied by the same BPP) for lcddev.

Why this approach?
Other possible approaches would be:
1) modify lcddev driver to translate received buffer data to a
buffer similar to the framebuffer. That wouldn't be efficient
considering memory allocation.
2) Create a new callback function. While possible, it'd be confusing
to create a different callback to draw the whole screen and another
to draw only an area of the screen. Also, these callbacks would
differ themselves only from the way the buffer is filled.
3) Simply reverting 664d45dcba would
break the usage of the putarea callback to draw an area of the
display, which would also be inefficient.

This approach is based on the Zephyr's implementation of the ST7789
driver: the buffer starts from the beginiing of the region that would
be drawn. The display device driver's putarea implementation should
check if the operation refers to a full screen/full row and implement
(if possible) a single operation to send the data to be drawn more
efficiently.

Finally, this approach requires that the drivers which implement
the putarea callback and expects the entire framebuffer buffer
to be modified. They don't need to calculate where the data begins
as the new buffer represents the data from the address that is
actually being drawn. This includes adjusting the LCD drivers
GC9A01 and ST7789 and the driver for APA102-based LED matrix display.
2022-08-13 20:36:45 +08:00
Xiang Xiao
2b37909c9e libc: Move crc8.h, crc16.h and crc32.h from include to include/nuttx
to avoid the conflict with the 3rd party library

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-13 13:28:24 +03:00
Masayuki Ishikawa
690c178e4b arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (4/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 0628019c2c
  Author: David Sidrane <David.Sidrane@NscDg.com>
  Date:   Wed Jul 13 11:01:49 2022 -0700

      imxrt:Enet ensure proper dcache for Writeback mode

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Masayuki Ishikawa
fb8562763a arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (3/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 522a949ed5
  Author: David Sidrane <David.Sidrane@NscDg.com>
  Date:   Wed Jul 13 11:00:11 2022 -0700

      imxrt:enet Better interrupt state handeling

- NOTE: I also fixed typo and compile error in the above commit

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Masayuki Ishikawa
6dfd01885d arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (2/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 81f03a9151
  Author: David Sidrane <David.Sidrane@NscDg.com>
  Date:   Tue Mar 15 14:27:51 2022 -0700

     imxrt:ETH Add Support for ETH2

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Masayuki Ishikawa
4e4ebba306 arch: imx6: Apply the imxrt_enet.c changes to imx_enet.c (1/4)
Summary:
- This commit applies the following imxrt_enet.c changes to imx_enet.c

  commit 12a515ebb6
  Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
  Date:   Thu Feb 4 11:27:09 2021 +0900

      arch: imxrt: Introduce CONFIG_NET_GUARDSIZE to imxrt_enet.c

Impact:
- imx_enet.c

Testing:
- Tested with qemu-6.2 (defconfig will be updated later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-12 10:30:48 -04:00
Robert Middleton
5d12e350da pic32mx: add option to disable JTAG at runtime
Add a new option to optionally disable JTAG at runtime.  Defaults to enabling
JTAG at runtime as that is the state the processor comes up in.
2022-08-11 11:24:41 -03:00
Alan Carvalho de Assis
0b4ef1406d xtensa/esp32s2: Add basic support to SPI 2022-08-11 15:49:55 +03:00
Petro Karashchenko
27fe5a50c6 arch/arm/stm32f7: fix cache invalidation issue in Ethernet RX
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-11 03:40:25 -04:00
Petro Karashchenko
4cd7e33b8d arch/arm/samv7: fix compilation warnings
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-11 10:00:39 +08:00
Petro Karashchenko
49d26e1b50 arch/arm/samv7: get TX DMA running for HSMCI interface
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-11 10:00:39 +08:00
Ville Juven
b8b541fbf5 mpfs: Remove the ddrstorage section from the OpenSBI package
It is not really needed; g_hart_stacks is only used during SBI init as
a temporary stack area. We can use the scratch area buffers for this, as
the scratch areas define almost 4K of extra space, which is used for
exception stacks anyway.
2022-08-10 10:01:47 +03:00
David Sidrane
32c4bdb7a6 s32k1xx:LPI2C Add DMA support 2022-08-10 11:22:38 +08:00
raiden00pl
08b8234e9e arch/arm/src/stm32f7: port ADC driver from arch/stm32
This change adds support for the following features:
  - injected channels (default: 0)
  - ADC resolution (default: 12bit)
  - ADC low-level operations
  - ADC external triggers
  - custom ADC interrupts
  - ADC sample time configuration
  - configurable ADC SCAN mode (default on if DMA)
  - configurable ADC DMA mode (default: one shot mode)
  - reset the ADC block only if all ADC instances are closed
2022-08-10 02:03:51 +08:00
Ville Juven
60042fea74 risc-v: Implement riscv_sbi_set_timer
This implements riscv_sbi_set_timer. This requires the OpenSBI companion
software to work (but this is needed by the kernel mode anyways).
2022-08-10 02:02:39 +08:00
David Sidrane
4ee917c14c stm32f7:Serial Fix breakage from #6779 2022-08-09 20:18:23 +03:00
Jiuzhu Dong
fe17f747a7 fs/directory: move private directory information to filesystem
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-08-09 23:30:01 +08:00
Jiuzhu Dong
90db4daca9 fs/directory: update readdir interface for all filesystem
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-08-09 23:30:01 +08:00
Jiuzhu Dong
3a70962b7a fs/directory: use file mode to manage directory
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-08-09 23:30:01 +08:00
Jiuzhu Dong
094e986bbd fcntl/O_CLOEXEC: add O_CLOEXEC map for hostfs
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-08-09 23:30:01 +08:00
Ville Juven
31bb362aab risc-v: Fix kernel MMU mapping for L3 table
The L3 table address was calculated incorrectly. For every 2MiB of
mapped memory, an offset of 4KiB is needed from the base of the L3
table. The old calculation failed if paddr was not aligned to a 2MiB
boundary.
2022-08-09 23:14:46 +08:00
David Sidrane
2e7b594bf4 s32k1xx:Add s32k146 DMAMUX 2022-08-09 16:29:21 +03:00
David Sidrane
3813320c31 s32k1xx_edma:Add Looping and cleanup
s32k1xx:EDMA Use aligned_data macros

s32k1xx:EDMA CONFIG_ARCH_CHIP_S32K14x->CONFIG_ARCH_CHIP_S32K14X

s32k1xx:EDMA remove FAR keyword

s32k1xx:EDMA Fix C&P error from Kinetis

s32k1xx:EDMA TCD Alignment of 32 Bytes to support Scatter/Gather

s32k1xx:EDMA Fix access violation

s32k1xx:dmamux fixed missing closing paren
2022-08-09 16:29:21 +03:00
raiden00pl
a05db5299e arch/arm/src/stm32f7: port PWM driver from arch/stm32
This change adds support for the following features:
  1. PWM complementary outputs
  2. interface for low-level PWM operations
  3. support for all PWM channel modes
  4. support for internal PWM channels (TIM1/TIM8)
  5. support for PWM channel polarity and IDLE state
  6. support for TRGO and BREAK
2022-08-09 12:37:49 +08:00
raiden00pl
fd02855c63 arch/stm32f7: rename PWM complementary output pins from CHxN to CHxNOUT (always output) 2022-08-09 12:37:49 +08:00
David Sidrane
050ce3e0d3 kinetis:spi remove ttype & do cache ops 2022-08-09 10:46:31 +08:00
David Sidrane
22580584d2 kinetis:[lp]serial remove ttype & do cache ops 2022-08-09 10:46:31 +08:00
David Sidrane
7a7a01153b Kinetis:edma Cleanup
Kientis:edma Cleanup

    Kinetis:EDMA Interrupt on last TCD

    Kintis:edma remove dcache operations on passed data

       Data can be chained in TCD and both read and write
       can be in the chain. So the dmach ttype is not
       relevent for all; the TCDs. Therefor we only perform
       dcache operations on internal strutures, The caller
       must perform dcache operations on their data.

kinetis:EDMA TCD Alignment of 32 Bytes to support Scatter/Gather
2022-08-09 10:46:31 +08:00
Nathan Hartman
dd718e78f7 Fix typos 2022-08-07 23:33:19 +08:00
p-eaglelaw
631ae0032e fix warning 2022-08-07 13:03:39 +08:00
p-eaglelaw
702e2f3680 remove unused lib,fix according review comments 2022-08-07 01:57:02 +08:00
David Sidrane
55aaba53fc imxrt:SPI add DMA support 2022-08-06 15:32:07 +08:00
David Sidrane
fa58381e58 imxrt:serial add TX & RX DMA support
imxrt:serial ioctl should call to proper setup
2022-08-06 15:32:07 +08:00
David Sidrane
85ec2e1446 imxrt:Add LPI2C DMA 2022-08-06 15:32:07 +08:00
David Sidrane
f34acdb936 imxrt:lpi2c add parens for macros expansions 2022-08-06 15:32:07 +08:00
Peter van der Perk
22d41f6b9c LPC17xx_40xx PWM multichannel support
USB no softconnect
SocketCAN kconfig fixes
2022-08-06 15:31:38 +08:00
David Sidrane
6ab76bfc7c imrt105x:ENET Match Data sheet Naming 2022-08-06 15:31:23 +08:00
David Sidrane
b9a6b01e6c imrt102x:ENET Match Data sheet Naming 2022-08-06 15:31:23 +08:00
David Sidrane
0628019c2c imxrt:Enet ensure proper dcache for Writeback mode
Use aligned_data
   added proper handeling for Writeback
2022-08-06 15:31:23 +08:00
David Sidrane
522a949ed5 imxrt:enet Better interrupt state handeling 2022-08-06 15:31:23 +08:00
David Sidrane
1d88f8df37 imxrt:pinmux ENET2 correct ALT for GPIO_ENET2_REF_CLK2 2022-08-06 15:31:23 +08:00
David Sidrane
bced1a3cb4 imxrt:Fix Ethernet Clocking 2022-08-06 15:31:23 +08:00
David Sidrane
6a2c1fb1de imxrt:Kconfig add IMXRT_PHY_POLLING 2022-08-06 15:31:23 +08:00
David Sidrane
81f03a9151 imxrt:ETH Add Support for ETH2 2022-08-06 15:31:23 +08:00
David Sidrane
49d304257c imxrt:All boards ARCH_PHY_INTERRUPT is a board property 2022-08-06 15:31:23 +08:00
David Sidrane
3af910f8b6 imxrt:Ethernet Add LAN8742A support 2022-08-06 15:31:23 +08:00
Petro Karashchenko
b3cd9090d1 drivers/net: make sure that net driver d_buf is 16-bit aligned
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-08-05 22:21:37 +08:00
raiden00pl
93584f8668 arch/stm32f0l0g0: add SPI3 support (STM32G0B0 chips) 2022-08-05 13:57:56 +08:00
Xiang Xiao
c61381da56 arch/risc-v: Fix error: invalid application of 'sizeof' to incomplete type 'struct tls_info_s'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-05 08:45:11 +03:00
David Sidrane
33efeeeafd imxrt:EDMA add loop support
imxrt:edma imxrt_dmach_{xfrsetup|getcount} DMACH_HANDLE *->DMACH_HANDLE

imxrt:EDMA TCD Alignment of 32 Bytes to support Scatter/Gather
2022-08-05 09:44:36 +08:00
David Sidrane
1421bc58db imxrt:Correct register usage in up_rtc_settime 2022-08-05 09:43:36 +08:00
David Sidrane
5e902861d9 imxrt:usdhc fix error when CONFIG_ARMV7M_DCACHE is off 2022-08-05 09:43:36 +08:00
David Sidrane
b9c6284750 imxrt:lowputc add extern "C" 2022-08-05 09:43:36 +08:00
Nathan Hartman
20bdd44e7b Remove executable permission from source and build files. 2022-08-04 12:48:18 -03:00
Xiang Xiao
8582a12388 drivers: Reorganize the power related code layout
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-08-04 10:28:28 +03:00
Masayuki Ishikawa
8e7752c7da arch: common: Fix up_check_tcbstack() for CONFIG_ARCH_ADDRENV=y
Summary:
- I noticed that ps shows incorrect stack usage when running
  getprime in the background.
- With CONFIG_ARCH_ADDRENV=y, a user task including pthread
  allocates its stack in the user space that needs to be
  accessed with a correct address environment.
- This commit fixes this issue.

Impact:
- CONFIG_ARCH_ADDRENV=y only

Testing:
- Tested with sabre-6quad:knsh on qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-08-04 11:13:16 +08:00
Eero Nurkkala
e0291b1ce8 risc-v/mpfs: usb: configure fifos properly
RX_FIFO_ADDRs and TX_FIFO_ADDR were misconfigured. These addresses
overlapped causing data corruption during high USB loads. For
example, data corruption was present during the following conditions:

  1. Composite USB driver was used (CDC/ACM + Mass storage)
  2. /dev/ttyACM0 was accessed instantly from Linux side when
     starting up.
  3. Training data was sent to /dev/ttyACM0 from NuttX from the
     very beginning periodically.

It was observed that while Mass storage was negotiating, sometimes
data sent from NuttX to Linux via CDC/ACM was corrupt, although it
was sent properly on the TX fifo.

Also, don't access TXCSRL_REG_EPN_TX_FIFO_NE_MASK for EP0 as it's
not applicable.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-08-03 23:44:12 +08:00
raiden00pl
981ad9fc1e arch/stm32xx/Kconfig: simplify PWM options and unify them among stm32 chips 2022-08-03 23:43:19 +08:00
raiden00pl
935f110438 arch/stm32f7/stm32_tim.c: include the missing RCC header 2022-08-03 23:42:52 +08:00
raiden00pl
47dbad0a8b arch/stm32/stm32_foc.c: fix some ADC and PWM ifdefs 2022-08-03 23:42:37 +08:00
Peter van der Perk
a6da6dcec6 LPC17_40 CAN driver SocketCAN support 2022-08-03 17:58:57 +08:00
chao.an
d501e01eef arm/backtrace: use sp unwind if FRAME_POINTER is enabled on thumb mode
GCC toolchain Bug 92172 - ARM Thumb2 frame pointers inconsistent with clang

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92172

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-08-03 17:58:36 +08:00
Peter Bee
f20cd0295f arch: fix typo
Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2022-08-03 17:37:08 +08:00