/**************************************************************************** * arch/arm/src/sama5/chip/sam_ehci.h * * Copyright (C) 2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************/ #ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EHCI_H #define __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EHCI_H /**************************************************************************** * Included Files ****************************************************************************/ #include #include #include "chip.h" #include "chip/sam_memorymap.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ /* The SAMA5 supports 3 root hub ports */ #define SAM_EHCI_NRHPORT 3 /* Registers ****************************************************************/ /* Traditionally, NuttX specifies register locations using individual * register offsets from a base address. That tradition is broken here and, * instead, register blocks are represented as structures. This is done here * because, in principle, EHCI operational register address may not be known * at compile time; the operational registers lie at an offset specified in * the 'caplength' byte of the Host Controller Capability Registers. * * However, for the case of the SAMA5 EHCI, we know apriori that the value * of 'caplength' is 0x10. We keep this structure, however, to faciltate * porting this driver to other environments where, perhaps, such knowledge * is not available. */ /* Host Controller Capability Registers */ #define HCCR ((struct ehci_hccr_s *)SAM_UHPEHCI_VSECTION) /* Host Controller Operational Registers */ #define HCOR ((volatile struct ehci_hcor_s *)(SAM_UHPEHCI_VSECTION + 0x10)) /* USB2 Debug Port Register Interface. These are not documented, but I was * able to find these by registers by peeking at EHCI memory. */ #define HDEBUG ((volatile struct ehci_debug_s *)(SAM_UHPEHCI_VSECTION + 0x90)) /**************************************************************************** * Public Types ****************************************************************************/ /**************************************************************************** * Public Data ****************************************************************************/ /**************************************************************************** * Public Functions ****************************************************************************/ #endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_EHCI_H */