/**************************************************************************** * boards/arm/imx6/sabre-6quad/scripts/dramboot.ld * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************/ /* The i.MX6 has 256 KB of OCRAM beginning at virtual address 0x0090:0000 * This memory configuration, however, loads into the 1GB DDR3 on board * the Sabre 6Quad K which lies at 0x1000:0000. Code is positioned at * 0x10800000 which the standard load address of Linux when used with uBoot. * * Vectors in low memory are assumed and 16KB of OCRAM is reserved at the * high end of OCRAM for the page table. */ MEMORY { oscram (W!RX) : ORIGIN = 0x00900000, LENGTH = 256K - 16K ddr3 (W!RX) : ORIGIN = 0x10800000, LENGTH = 1024M - 8M } ENTRY(entry) ENTRY(_stext) SECTIONS { .text : { _stext = ABSOLUTE(.); *(.vectors) *(.text .text.*) *(.fixup) *(.gnu.warning) *(.rodata .rodata.*) *(.gnu.linkonce.t.*) *(.glue_7) *(.glue_7t) *(.got) *(.gcc_except_table) *(.gnu.linkonce.r.*) *(.ARM.extab*) *(.gnu.linkonce.armextab.*) _etext = ABSOLUTE(.); } > ddr3 .init_section : { _sinit = ABSOLUTE(.); *(.init_array .init_array.*) _einit = ABSOLUTE(.); } > ddr3 .ARM.extab : { *(.ARM.extab*) } > ddr3 /* .ARM.exidx is sorted, so has to go in its own output section. */ PROVIDE_HIDDEN (__exidx_start = .); .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } > ddr3 PROVIDE_HIDDEN (__exidx_end = .); /* Uninitialized data */ .data : { _sdata = ABSOLUTE(.); *(.data .data.*) *(.gnu.linkonce.d.*) CONSTRUCTORS . = ALIGN(4); _edata = ABSOLUTE(.); } > ddr3 .bss : { _sbss = ABSOLUTE(.); *(.bss .bss.*) *(.gnu.linkonce.b.*) *(COMMON) . = ALIGN(4); _ebss = ABSOLUTE(.); } > ddr3 .noinit : { _snoinit = ABSOLUTE(.); *(.noinit*) _enoinit = ABSOLUTE(.); } > ddr3 /* Stabs debugging sections. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } .stab.excl 0 : { *(.stab.excl) } .stab.exclstr 0 : { *(.stab.exclstr) } .stab.index 0 : { *(.stab.index) } .stab.indexstr 0 : { *(.stab.indexstr) } .comment 0 : { *(.comment) } .debug_abbrev 0 : { *(.debug_abbrev) } .debug_info 0 : { *(.debug_info) } .debug_line 0 : { *(.debug_line) } .debug_pubnames 0 : { *(.debug_pubnames) } .debug_aranges 0 : { *(.debug_aranges) } }