/**************************************************************************** * arch/misoc/include/irq.h * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. The * ASF licenses this file to you under the Apache License, Version 2.0 (the * "License"); you may not use this file except in compliance with the * License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the * License for the specific language governing permissions and limitations * under the License. * ****************************************************************************/ /* This file should never be included directly but, rather, only indirectly * through nuttx/irq.h */ #ifndef __ARCH_MISOC_INCLUDE_IRQ_H #define __ARCH_MISOC_INCLUDE_IRQ_H /**************************************************************************** * Included Files ****************************************************************************/ #include #ifndef __ASSEMBLY__ # include #endif #include #include #ifdef CONFIG_ARCH_CHIP_LM32 # include #endif #ifdef CONFIG_ARCH_CHIP_MINERVA # include #endif /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ #ifndef __ASSEMBLY__ #ifdef __cplusplus #define EXTERN extern "C" extern "C" { #else #define EXTERN extern #endif /**************************************************************************** * Public Data ****************************************************************************/ /* This holds a references to the current interrupt level register storage * structure. If is non-NULL only during interrupt processing. */ EXTERN volatile uint32_t *g_current_regs; /**************************************************************************** * Public Function Prototypes ****************************************************************************/ /**************************************************************************** * Name: up_cpu_index * * Description: * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that * corresponds to the currently executing CPU. * * Input Parameters: * None * * Returned Value: * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that * corresponds to the currently executing CPU. * ****************************************************************************/ #define up_cpu_index() (0) /**************************************************************************** * Inline functions ****************************************************************************/ /**************************************************************************** * Name: up_interrupt_context * * Description: * Return true is we are currently executing in the interrupt * handler context. * ****************************************************************************/ #define up_interrupt_context() (g_current_regs != NULL) /**************************************************************************** * Public Function Prototypes ****************************************************************************/ irqstate_t up_irq_save(void); irqstate_t up_irq_enable(void); void up_irq_restore(irqstate_t flags); #undef EXTERN #ifdef __cplusplus } #endif #endif #endif /* __ARCH_MISOC_INCLUDE_IRQ_H */