# # For a description of the syntax of this configuration file, # see misc/tools/kconfig-language.txt. # if ARCH_ARM comment "ARM Options" choice prompt "ARM chip selection" default ARCH_CHIP_STM32 config ARCH_CHIP_C5471 bool "TMS320 C5471" select ARCH_ARM7TDMI select ARCH_HAVE_LOWVECTORS ---help--- TI TMS320 C5471, A180, or DA180 (ARM7TDMI) config ARCH_CHIP_CALYPSO bool "Calypso" select ARCH_ARM7TDMI select ARCH_HAVE_HEAP2 select ARCH_HAVE_LOWVECTORS ---help--- TI Calypso-based cell phones (ARM7TDMI) config ARCH_CHIP_DM320 bool "TMS320 DM320" select ARCH_ARM926EJS select ARCH_HAVE_LOWVECTORS ---help--- TI DMS320 DM320 (ARM926EJS) config ARCH_CHIP_IMX bool "Freescale iMX" select ARCH_ARM920T select ARCH_HAVE_HEAP2 select ARCH_HAVE_LOWVECTORS ---help--- Freescale iMX architectures (ARM920T) config ARCH_CHIP_KINETIS bool "Freescale Kinetis" select ARCH_CORTEXM4 select ARCH_HAVE_MPU select ARCH_HAVE_FPU select ARCH_HAVE_RAMFUNCS select ARCH_RAMFUNCS ---help--- Freescale Kinetis Architectures (ARM Cortex-M4) config ARCH_CHIP_KL bool "Freescale Kinetis L" select ARCH_CORTEXM0 select ARCH_HAVE_CMNVECTOR ---help--- Freescale Kinetis L Architectures (ARM Cortex-M0+) config ARCH_CHIP_LM bool "TI Stellaris" select ARCH_HAVE_MPU ---help--- TI Stellaris LMS3 and LM4F architecutres (ARM Cortex-M3/4) config ARCH_CHIP_LPC17XX bool "NXP LPC17xx" select ARCH_CORTEXM3 select ARCH_HAVE_CMNVECTOR select ARCH_HAVE_MPU ---help--- NXP LPC17xx architectures (ARM Cortex-M3) config ARCH_CHIP_LPC214X bool "NXP LPC214x" select ARCH_ARM7TDMI select ARCH_HAVE_LOWVECTORS ---help--- NXP LPC2145x architectures (ARM7TDMI) config ARCH_CHIP_LPC2378 bool "NXP LPC2378" select ARCH_ARM7TDMI select ARCH_HAVE_LOWVECTORS ---help--- NXP LPC2145x architectures (ARM7TDMI) config ARCH_CHIP_LPC31XX bool "NXP LPC31XX" select ARCH_ARM926EJS select ARCH_HAVE_LOWVECTORS ---help--- NPX LPC31XX architectures (ARM926EJS). config ARCH_CHIP_LPC43XX bool "NXP LPC43XX" select ARCH_CORTEXM4 select ARCH_HAVE_CMNVECTOR select ARMV7M_CMNVECTOR select ARCH_HAVE_MPU select ARCH_HAVE_FPU ---help--- NPX LPC43XX architectures (ARM Cortex-M4). config ARCH_CHIP_NUC1XX bool "Nuvoton NUC100/120" select ARCH_CORTEXM0 select ARCH_HAVE_CMNVECTOR ---help--- NPX LPC43XX architectures (ARM Cortex-M4). config ARCH_CHIP_SAMA5 bool "Atmel AT91SAMA5" select ARCH_CORTEXA5 select ARCH_HAVE_FPU select ARCH_HAVE_LOWVECTORS ---help--- Atmel AT91SAMA5 (ARM Cortex-A5) config ARCH_CHIP_SAM34 bool "Atmel AT91SAM3/SAM4" select ARCH_HAVE_MPU select ARCH_HAVE_RAMFUNCS ---help--- Atmel AT91SAM3 (ARM Cortex-M3) and SAM4 (ARM Cortex-M4) architectures config ARCH_CHIP_STM32 bool "STMicro STM32" select ARCH_HAVE_CMNVECTOR select ARCH_HAVE_MPU select ARCH_HAVE_I2CRESET ---help--- STMicro STM32 architectures (ARM Cortex-M3/4). config ARCH_CHIP_STR71X bool "STMicro STR71x" select ARCH_ARM7TDMI select ARCH_HAVE_LOWVECTORS ---help--- STMicro STR71x architectures (ARM7TDMI). endchoice config ARCH_ARM7TDMI bool default n config ARCH_ARM926EJS bool default n select ARCH_HAVE_MMU config ARCH_ARM920T bool default n select ARCH_HAVE_MMU config ARCH_CORTEXM0 bool default n select ARCH_IRQPRIO config ARCH_CORTEXM3 bool default n select ARCH_IRQPRIO select ARCH_HAVE_RAMVECTORS config ARCH_CORTEXM4 bool default n select ARCH_IRQPRIO select ARCH_HAVE_RAMVECTORS config ARCH_CORTEXA5 bool default n select ARCH_IRQPRIO select ARCH_HAVE_MMU config ARCH_FAMILY string default "arm" if ARCH_ARM7TDMI || ARCH_ARM926EJS || ARCH_ARM920T default "armv6-m" if ARCH_CORTEXM0 default "armv7-a" if ARCH_CORTEXA5 default "armv7-m" if ARCH_CORTEXM3 || ARCH_CORTEXM4 config ARCH_CHIP string default "c5471" if ARCH_CHIP_C5471 default "calypso" if ARCH_CHIP_CALYPSO default "dm320" if ARCH_CHIP_DM320 default "imx" if ARCH_CHIP_IMX default "kinetis" if ARCH_CHIP_KINETIS default "kl" if ARCH_CHIP_KL default "lm" if ARCH_CHIP_LM default "lpc17xx" if ARCH_CHIP_LPC17XX default "lpc214x" if ARCH_CHIP_LPC214X default "lpc2378" if ARCH_CHIP_LPC2378 default "lpc31xx" if ARCH_CHIP_LPC31XX default "lpc43xx" if ARCH_CHIP_LPC43XX default "nuc1xx" if ARCH_CHIP_NUC1XX default "sama5" if ARCH_CHIP_SAMA5 default "sam34" if ARCH_CHIP_SAM34 default "stm32" if ARCH_CHIP_STM32 default "str71x" if ARCH_CHIP_STR71X config ARMV7M_USEBASEPRI bool "Use BASEPRI Register" default n depends on ARCH_CORTEXM3 || ARCH_CORTEXM4 ---help--- Use the BASEPRI register to enable and disable able interrupts. By default, the PRIMASK register is used for this purpose. This usually results in hardfaults that are properly handling by the RTOS. Using the BASEPRI register will avoid these hardfault. That is needed primarily for integration with some toolchains. config ARCH_HAVE_CMNVECTOR bool config ARMV7M_CMNVECTOR bool "Use common ARMv7-M vectors" default n depends on ARCH_HAVE_CMNVECTOR ---help--- Some architectures use their own, built-in vector logic. Some use only the common vector logic. Some can use either their own built-in vector logic or the common vector logic. This applies only to ARMv7-M architectures. config ARCH_HAVE_FPU bool default n config ARCH_FPU bool "FPU support" default y depends on ARCH_HAVE_FPU ---help--- Build in support for the ARM Cortex-M4 Floating Point Unit (FPU). Check your chip specifications first; not all Cortex-M4 chips support the FPU. config ARCH_HAVE_MPU bool default n config ARMV7M_MPU bool "MPU support" default n depends on ARCH_HAVE_MPU ---help--- Build in support for the ARM Cortex-M3/4 Memory Protection Unit (MPU). Check your chip specifications first; not all Cortex-M3/4 chips support the MPU. config ARMV7M_MPU_NREGIONS int "Number of MPU regions" default 8 depends on ARMV7M_MPU ---help--- This is the number of protection regions supported by the MPU. config ARCH_HAVE_LOWVECTORS bool config ARCH_LOWVECTORS bool "Vectors in low memory" default n depends on ARCH_HAVE_LOWVECTORS ---help--- Support ARM vectors in low memory. config PGTABLE_VADDR hex "Page table virtual address" default 0x0 depends on ARCH_HAVE_MMU ---help--- Page table virtual address (might be defined in the board.h file). Not applicable to all architectures. config ARCH_ROMPGTABLE bool "ROM page table" default n depends on ARCH_HAVE_MMU ---help--- Support a fixed memory mapping use a (read-only) page table in ROM/FLASH. config PAGING bool "On-demand paging" default n depends on ARCH_HAVE_MMU && !ARCH_ROMPGTABLE ---help--- If set =y in your configation file, this setting will enable the on-demand paging feature as described in http://www.nuttx.org/NuttXDemandPaging.html. config DEBUG_HARDFAULT bool "Verbose Hard-Fault Debug" default n depends on DEBUG && (ARCH_CORTEXM3 || ARCH_CORTEXM4) ---help--- Enables verbose debug output when a hard fault is occurs. This verbose output is sometimes helpful when debugging difficult hard fault problems, but may be more than you typcially want to see. if ARCH_CORTEXM0 source arch/arm/src/armv6-m/Kconfig endif if ARCH_CORTEXA5 source arch/arm/src/armv7-a/Kconfig endif if ARCH_CORTEXM3 || ARCH_CORTEXM4 source arch/arm/src/armv7-m/Kconfig endif if ARCH_ARM7TDMI || ARCH_ARM926EJS source arch/arm/src/arm/Kconfig endif if ARCH_CHIP_C5471 source arch/arm/src/c5471/Kconfig endif if ARCH_CHIP_CALYPSO source arch/arm/src/calypso/Kconfig endif if ARCH_CHIP_DM320 source arch/arm/src/dm320/Kconfig endif if ARCH_CHIP_IMX source arch/arm/src/imx/Kconfig endif if ARCH_CHIP_KINETIS source arch/arm/src/kinetis/Kconfig endif if ARCH_CHIP_KL source arch/arm/src/kl/Kconfig endif if ARCH_CHIP_LM source arch/arm/src/lm/Kconfig endif if ARCH_CHIP_LPC17XX source arch/arm/src/lpc17xx/Kconfig endif if ARCH_CHIP_LPC214X source arch/arm/src/lpc214x/Kconfig endif if ARCH_CHIP_LPC2378 source arch/arm/src/lpc2378/Kconfig endif if ARCH_CHIP_LPC31XX source arch/arm/src/lpc31xx/Kconfig endif if ARCH_CHIP_LPC43XX source arch/arm/src/lpc43xx/Kconfig endif if ARCH_CHIP_NUC1XX source arch/arm/src/nuc1xx/Kconfig endif if ARCH_CHIP_SAMA5 source arch/arm/src/sama5/Kconfig endif if ARCH_CHIP_SAM34 source arch/arm/src/sam34/Kconfig endif if ARCH_CHIP_STM32 source arch/arm/src/stm32/Kconfig endif if ARCH_CHIP_STR71X source arch/arm/src/str71x/Kconfig endif endif