/**************************************************************************** * boards/risc-v/gapduino/scripts/ld.script * * Copyright (C) 2018 Gregory Nutt. All rights reserved. * Author: hhuysqt <1020988872@qq.com> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************/ /* Not needed, but we need separate linker scripts anyway */ OUTPUT_ARCH(riscv) SEARCH_DIR(.) __DYNAMIC = 0; MEMORY { L2 : ORIGIN = 0x1C000000, LENGTH = 0x80000 FC_tcdm : ORIGIN = 0x1B000004, LENGTH = 0x3ffc FC_tcdm_aliased : ORIGIN = 0x00000004, LENGTH = 0x3ffc } __L1_STACK_SIZE = 0x400; __FC_STACK_SIZE = 0x1000; /* We have to align each sector to word boundaries as our current s19->slm * conversion scripts are not able to handle non-word aligned sections. */ SECTIONS { .vectors_M : { . = ALIGN(4); IRQ_U_Vector_Base = .; KEEP(*(.vectors_M)) } > L2 .dbg_struct : { . = ALIGN(4); IRQ_M_Vector_Base = .; KEEP(*(.dbg_struct)) } > L2 .text : { . = ALIGN(4); _stext = .; *(.text.reset) *(.text) *(.text.*) _etext = .; *(.lit) *(.shdata) _endtext = .; } > L2 .ctors : { . = ALIGN(4); __CTOR_LIST__ = .; /* gcc uses crtbegin.o to find the start of * the constructors, so we make sure it is * first. Because this is a wildcard, it * doesn't matter if the user does not * actually link against crtbegin.o; the * linker won't look for a file to match a * wildcard. The wildcard also means that it * doesn't matter which directory crtbegin.o * is in. */ KEEP (*crtbegin.o(.ctors)) KEEP (*crtbegin?.o(.ctors)) /* We don't want to include the .ctor section from * from the crtend.o file until after the sorted ctors. * The .ctor section from the crtend file contains the * end of ctors marker and it must be last */ KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) __CTOR_END__ = .; } > L2 .dtors : { . = ALIGN(4); __DTOR_LIST__ = .; KEEP (*crtbegin.o(.dtors)) KEEP (*crtbegin?.o(.dtors)) KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) __DTOR_END__ = .; } > L2 /*--------------------------------------------------------------------*/ /* Global constructor/destructor segement */ /*--------------------------------------------------------------------*/ .preinit_array : { PROVIDE_HIDDEN (__preinit_array_start = .); KEEP (*(.preinit_array*)) PROVIDE_HIDDEN (__preinit_array_end = .); } > L2 .init_array : { PROVIDE_HIDDEN (__init_array_start = .); KEEP (*(SORT(.init_array.*))) KEEP (*(.init_array*)) PROVIDE_HIDDEN (__init_array_end = .); } > L2 .fini_array : { PROVIDE_HIDDEN (__fini_array_start = .); KEEP (*(SORT(.fini_array.*))) KEEP (*(.fini_array*)) PROVIDE_HIDDEN (__fini_array_end = .); } > L2 .rodata : { /* Due to limitations on FPGA loader, loadable sections must have * base and size aligned on 4 bytes */ . = ALIGN(4); *(.rodata); *(.rodata.*) . = ALIGN(4); } > L2 .gnu.offload_funcs : /* GCC Offload table of offloaded functions and variables */ { . = ALIGN(4); KEEP(*(.gnu.offload_funcs)) } > L2 .gnu.offload_vars : { . = ALIGN(4); KEEP(*(.gnu.offload_vars)) } > L2 .data : { . = ALIGN(4); __DATA_RAM = .; __data_start__ = .; /* create a global symbol at data start */ *(.data); *(.data.*) KEEP(*(.jcr*)) . = ALIGN(4); __data_end__ = .; /* define a global symbol at data end */ } > L2 .bss : { . = ALIGN(4); _sbss = .; __bss_start__ = .; *(.bss) *(.bss.*) *(.sbss) *(.sbss.*) *(COMMON) . = ALIGN(4); __bss_end__ = .; _ebss = .; } > L2 /* Heap would exhaust the L2 RAM */ _heap_start = .; _heap_end = ORIGIN(L2) + LENGTH(L2); /* Idle stack is on FC tdcm */ _idle_stack_start = ORIGIN(FC_tcdm); _idle_stack_end = ORIGIN(FC_tcdm) + LENGTH(FC_tcdm); .stab 0 (NOLOAD) : { [ .stab ] } .stabstr 0 (NOLOAD) : { [ .stabstr ] } }