/**************************************************************************** * boards/risc-v/espressif/common/scripts/esp32c3_simple_boot_sections.ld * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. The * ASF licenses this file to you under the Apache License, Version 2.0 (the * "License"); you may not use this file except in compliance with the * License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the * License for the specific language governing permissions and limitations * under the License. * ****************************************************************************/ /* Default entry point: */ ENTRY(__start); SECTIONS { .iram0.text : { _iram_start = ABSOLUTE(.); /* Vectors go to start of IRAM */ KEEP(*(.exception_vectors.text)); . = ALIGN(4); *(.iram1) *(.iram1.*) *libsched.a:irq_dispatch.*(.text .text.* .literal .literal.*) *libarch.a:*brownout.*(.text .text.* .literal .literal.*) *libarch.a:*cpu.*(.text .text.* .literal .literal.*) *libarch.a:*gpio_hal.*(.text .text.* .literal .literal.*) *libarch.a:*periph_ctrl.*(.text .text.* .literal .literal.*) *libarch.a:*clk.*(.text .text.* .literal .literal.*) *libarch.a:*esp_clk.*(.text .text.* .literal .literal.*) *libarch.a:*esp_clk_tree.*(.text .text.* .literal .literal.*) *libarch.a:*esp_clk_tree_common.*(.text .text.* .literal .literal.*) *libarch.a:*clk_tree_hal.*(.text .text.* .literal .literal.*) *libarch.a:*rtc_init.*(.text .text.* .literal .literal.*) *libarch.a:*rtc_clk.*(.text .text.* .literal .literal.*) *libarch.a:*rtc_clk_init.*(.text .text.* .literal .literal.*) *libarch.a:*rtc_sleep.*(.text .text.* .literal .literal.*) *libarch.a:*rtc_time.*(.text .text.* .literal .literal.*) *libarch.a:*systimer.*(.text .text.* .literal .literal.*) *libarch.a:*systimer_hal.*(.text .text.* .literal .literal.*) *libarch.a:*uart_hal_iram.*(.text .text.* .literal .literal.*) *libarch.a:*wdt_hal_iram.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_banner_wrap.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_init.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_common.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_common_loader.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_console.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_console_loader.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_esp32c3.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_flash.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_flash_config_esp32c3.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_clock_init.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_clock_loader.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_efuse.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_panic.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_mem.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_random.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_random_esp32c3.*(.text .text.* .literal .literal.*) *libarch.a:*esp_image_format.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_soc.*(.text .text.* .literal .literal.*) *libarch.a:*bootloader_sha.*(.text .text.* .literal .literal.*) *libarch.a:*flash_encrypt.*(.text .text.* .literal .literal.*) *libarch.a:*cache_hal.*(.text .text.* .literal .literal.*) *libarch.a:*uart_hal.*(.text .text.* .literal .literal.*) *libarch.a:*mpu_hal.*(.text .text.* .literal .literal.*) *libarch.a:*mmu_hal.*(.text .text.* .literal .literal.*) *libarch.a:*uart_periph.*(.text .text.* .literal .literal.*) *libarch.a:*esp_rom_uart.*(.text .text.* .literal .literal.*) *libarch.a:*esp_rom_sys.*(.text .text.* .literal .literal.*) *libarch.a:*esp_rom_spiflash.*(.text .text.* .literal .literal.*) *libarch.a:*esp_efuse_fields.*(.text .text.* .literal .literal.*) *libarch.a:*esp_efuse_api_key.*(.text .text.* .literal .literal.*) *libarch.a:*log.*(.text .text.* .literal .literal.*) *libarch.a:*log_noos.*(.text .text.* .literal .literal.*) *libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*) esp_head.*(.literal .text .literal.* .text.*) esp_start.*(.literal .text .literal.* .text.*) } >iram0_0_seg AT > ROM /* This section is required to skip .iram0.text area because iram0_0_seg * and dram0_0_seg reflect the same address space on different buses. */ .dram0.dummy (NOLOAD): { . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start; } >dram0_0_seg /* Shared RAM */ .dram0.bss (NOLOAD) : { . = ALIGN (8); _bss_start = ABSOLUTE(.); _sbss = ABSOLUTE(.); *(.dynsbss) *(.sbss) *(.sbss.*) *(.gnu.linkonce.sb.*) *(.scommon) *(.sbss2) *(.sbss2.*) *(.gnu.linkonce.sb2.*) *(.dynbss) *(.bss) *(.bss.*) *(.share.mem) *(.gnu.linkonce.b.*) *(COMMON) . = ALIGN (8); _ebss = ABSOLUTE(.); _bss_end = ABSOLUTE(.); } >dram0_0_seg .noinit (NOLOAD): { /* This section contains data that is not initialized during load, * or during the application's initialization sequence. */ *(.noinit) *(.noinit.*) } >dram0_0_seg .dram0.data : { . = ALIGN (16); _data_start = ABSOLUTE(.); _sdata = ABSOLUTE(.); *(.data) *(.data.*) *(.gnu.linkonce.d.*) *(.data1) __global_pointer$ = . + 0x800; *(.sdata) *(.sdata.*) *(.gnu.linkonce.s.*) *(.sdata2) *(.sdata2.*) *(.gnu.linkonce.s2.*) *(.jcr) *(.dram1) *(.dram1.*) *libsched.a:irq_dispatch.*(.rodata .rodata.*) *libarch.a:*brownout.*(.rodata .rodata.*) *libarch.a:*cpu.*(.rodata .rodata.*) *libarch.a:*gpio_hal.*(.rodata .rodata.*) *libarch.a:*periph_ctrl.*(.rodata .rodata.*) *libarch.a:*clk.*(.rodata .rodata.*) *libarch.a:*esp_clk.*(.rodata .rodata.*) *libarch.a:*esp_clk_tree.*(.rodata .rodata.*) *libarch.a:*esp_clk_tree_common.*(.rodata .rodata.*) *libarch.a:*clk_tree_hal.*(.rodata .rodata.*) *libarch.a:*rtc_init.*(.rodata .rodata.*) *libarch.a:*rtc_clk.*(.rodata .rodata.*) *libarch.a:*rtc_clk_init.*(.rodata .rodata.*) *libarch.a:*rtc_sleep.*(.rodata .rodata.*) *libarch.a:*rtc_time.*(.rodata .rodata.*) *libarch.a:*systimer.*(.rodata .rodata.*) *libarch.a:*systimer_hal.*(.rodata .rodata.*) *libarch.a:*uart_hal_iram.*(.rodata .rodata.*) *libarch.a:*wdt_hal_iram.*(.rodata .rodata.*) *libarch.a:*bootloader_banner_wrap.*(.rodata .rodata.*) *libarch.a:*bootloader_init.*(.rodata .rodata.*) *libarch.a:*bootloader_common.*(.rodata .rodata.*) *libarch.a:*bootloader_common_loader.*(.rodata .rodata.*) *libarch.a:*bootloader_console.*(.rodata .rodata.*) *libarch.a:*bootloader_console_loader.*(.rodata .rodata.*) *libarch.a:*bootloader_esp32c3.*(.rodata .rodata.*) *libarch.a:*bootloader_flash.*(.rodata .rodata.*) *libarch.a:*bootloader_flash_config_esp32c3.*(.rodata .rodata.*) *libarch.a:*bootloader_clock_init.*(.rodata .rodata.*) *libarch.a:*bootloader_clock_loader.*(.rodata .rodata.*) *libarch.a:*bootloader_efuse.*(.rodata .rodata.*) *libarch.a:*bootloader_panic.*(.rodata .rodata.*) *libarch.a:*bootloader_mem.*(.rodata .rodata.*) *libarch.a:*bootloader_random.*(.rodata .rodata.*) *libarch.a:*bootloader_random_esp32c3.*(.rodata .rodata.*) *libarch.a:*esp_image_format.*(.rodata .rodata.*) *libarch.a:*bootloader_soc.*(.rodata .rodata.*) *libarch.a:*bootloader_sha.*(.rodata .rodata.*) *libarch.a:*flash_encrypt.*(.rodata .rodata.*) *libarch.a:*cache_hal.*(.rodata .rodata.*) *libarch.a:*uart_hal.*(.rodata .rodata.*) *libarch.a:*mpu_hal.*(.rodata .rodata.*) *libarch.a:*mmu_hal.*(.rodata .rodata.*) *libarch.a:*uart_periph.*(.rodata .rodata.*) *libarch.a:*esp_rom_uart.*(.rodata .rodata.*) *libarch.a:*esp_rom_sys.*(.rodata .rodata.*) *libarch.a:*esp_rom_spiflash.*(.rodata .rodata.*) *libarch.a:*esp_efuse_fields.*(.rodata .rodata.*) *libarch.a:*esp_efuse_api_key.*(.rodata .rodata.*) *libarch.a:*log.*(.rodata .rodata.*) *libarch.a:*log_noos.*(.rodata .rodata.*) *libarch.a:esp_spiflash.*(.rodata .rodata.*) esp_head.*(.rodata .rodata.*) esp_start.*(.rodata .rodata.*) . = ALIGN(4); _edata = ABSOLUTE(.); _data_end = ABSOLUTE(.); /* Heap starts at the end of .data */ _sheap = ABSOLUTE(.); } >dram0_0_seg AT > ROM _image_irom_vma = ADDR(.flash.text); _image_irom_lma = LOADADDR(.flash.text); _image_irom_size = LOADADDR(.flash.text) + SIZEOF(.flash.text) - _image_irom_lma; .flash.text : ALIGN(0xFFFF) { _stext = .; *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ *(.fini.literal) *(.fini) *(.gnu.version) _etext = .; /* Similar to _iram_start, this symbol goes here so it is * resolved by addr2line in preference to the first symbol in * the flash.text segment. */ _flash_cache_start = ABSOLUTE(0); } >default_code_seg AT > ROM .flash_rodata_dummy (NOLOAD) : ALIGN(0xFFFF) { /* Start at the same alignment constraint than .flash.text */ /* . = ALIGN(ALIGNOF(.flash.text)); */ /* Create an empty gap as big as .flash.text section */ . = . + SIZEOF(.flash.text); /* Prepare the alignment of the section above. Few bytes (0x20) must be * added for the mapping header. */ /*. = ALIGN(0x10000) + 0x20; */ } >default_rodata_seg _image_drom_vma = ADDR(.flash.rodata); _image_drom_lma = LOADADDR(.flash.rodata); _image_drom_size = LOADADDR(.flash.rodata) + SIZEOF(.flash.rodata) - _image_drom_lma; .flash.rodata : ALIGN(0xFFFF) { _srodata = ABSOLUTE(.); *(EXCLUDE_FILE (*libarch.a:esp_spiflash.* esp_head.* esp_start.*) .rodata) *(EXCLUDE_FILE (*libarch.a:esp_spiflash.* esp_head.* esp_start.*) .rodata.*) *(.rodata) *(.rodata.*) *(.srodata.*) *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ *(.gnu.linkonce.r.*) *(.rodata1) __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); *(.xt_except_table) *(.gcc_except_table .gcc_except_table.*) *(.gnu.linkonce.e.*) *(.gnu.version_r) . = (. + 3) & ~ 3; __eh_frame = ABSOLUTE(.); KEEP(*(.eh_frame)) . = (. + 7) & ~ 3; /* C++ constructor and destructor tables: * RISC-V GCC is configured with --enable-initfini-array so it emits an * .init_array section instead. */ _sinit = ABSOLUTE(.); KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*)) KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array)) _einit = ABSOLUTE(.); KEEP (*crtbegin.o(.dtors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) /* C++ exception handlers table: */ __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); *(.xt_except_desc) *(.gnu.linkonce.h.*) __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); *(.xt_except_desc_end) *(.dynamic) *(.gnu.version_d) _erodata = ABSOLUTE(.); /* Literals are also RO data. */ _lit4_start = ABSOLUTE(.); *(*.lit4) *(.lit4.*) *(.gnu.linkonce.lit4.*) _lit4_end = ABSOLUTE(.); . = ALIGN(4); } >default_rodata_seg AT > ROM /* Marks the end of IRAM code segment */ .iram0.text_end (NOLOAD) : { . = ALIGN (16); } >iram0_0_seg .iram0.data : { . = ALIGN(16); *(.iram.data) *(.iram.data*) } >iram0_0_seg .iram0.bss (NOLOAD) : { . = ALIGN(16); *(.iram.bss) *(.iram.bss*) . = ALIGN(16); _iram_end = ABSOLUTE(.); } >iram0_0_seg /* RTC fast memory holds RTC wake stub code !*/ .rtc.text : { . = ALIGN(4); *(.rtc.literal .rtc.text) } >rtc_iram_seg /* RTC BSS section. */ .rtc.bss (NOLOAD) : { *(.rtc.bss) } >rtc_iram_seg /* RTC data section holds RTC wake stub data/rodata. */ .rtc.data : { *(.rtc.data) *(.rtc.rodata) } >rtc_iram_seg /* This section holds RTC data that should have fixed addresses. * The data are not initialized at power-up and are retained during deep sleep. */ .rtc_reserved (NOLOAD): { . = ALIGN(4); _rtc_reserved_start = ABSOLUTE(.); /* New data can only be added here to ensure existing data are not moved. Because data have adhered to the end of the segment and code is relied on it. >> put new data here << */ *(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*) KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*)) _rtc_reserved_end = ABSOLUTE(.); } > rtc_reserved_seg _rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start; ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)), "RTC reserved segment data does not fit.") }