/****************************************************************************/ /* boards/z80/ez80/ez80f910200zco/scripts/ez80f910200zco.linkcmd */ /* */ /* Licensed to the Apache Software Foundation (ASF) under one or more */ /* contributor license agreements. See the NOTICE file distributed with */ /* this work for additional information regarding copyright ownership. The */ /* ASF licenses this file to you under the Apache License, Version 2.0 (the */ /* "License"); you may not use this file except in compliance with the */ /* License. You may obtain a copy of the License at */ /* */ /* http://www.apache.org/licenses/LICENSE-2.0 */ /* */ /* Unless required by applicable law or agreed to in writing, software */ /* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT*/ /* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the*/ /* License for the specific language governing permissions and limitations */ /* under the License. */ /* */ /****************************************************************************/ -FORMAT=OMF695,INTEL32 -map -maxhexlen=64 -quiet -NOwarnoverlap -xref -unresolved=fatal -sort ADDRESS=ascending -warn -NOdebug -NOigcase RANGE ROM $000000 : $03FFFF RANGE RAM $B80000 : $BFFFFF RANGE EXTIO $000000 : $00FFFF RANGE INTIO $000000 : $0000FF CHANGE STRSECT is ROM ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA COPY DATA ROM DEFINE __low_romdata = copy base of DATA DEFINE __low_data = base of DATA DEFINE __len_data = length of DATA DEFINE __low_bss = base of BSS DEFINE __len_bss = length of BSS DEFINE __stack = highaddr of RAM + 1 DEFINE __heaptop = highaddr of RAM DEFINE __heapbot = top of RAM + 1 DEFINE __low_romcode = copy base of CODE DEFINE __low_code = base of CODE DEFINE __len_code = length of CODE DEFINE __copy_code_to_ram = 0 DEFINE __crtl = 1 DEFINE __CS0_LBR_INIT_PARAM = $10 DEFINE __CS0_UBR_INIT_PARAM = $1f DEFINE __CS0_CTL_INIT_PARAM = $a8 DEFINE __CS0_BMC_INIT_PARAM = $02 DEFINE __CS1_LBR_INIT_PARAM = $c0 DEFINE __CS1_UBR_INIT_PARAM = $c7 DEFINE __CS1_CTL_INIT_PARAM = $28 DEFINE __CS1_BMC_INIT_PARAM = $02 DEFINE __CS2_LBR_INIT_PARAM = $80 DEFINE __CS2_UBR_INIT_PARAM = $bf DEFINE __CS2_CTL_INIT_PARAM = $28 DEFINE __CS2_BMC_INIT_PARAM = $81 DEFINE __CS3_LBR_INIT_PARAM = $00 DEFINE __CS3_UBR_INIT_PARAM = $00 DEFINE __CS3_CTL_INIT_PARAM = $00 DEFINE __CS3_BMC_INIT_PARAM = $02 DEFINE __RAM_CTL_INIT_PARAM = $C0 DEFINE __RAM_ADDR_U_INIT_PARAM = $B7 DEFINE __FLASH_CTL_INIT_PARAM = $68 DEFINE __FLASH_ADDR_U_INIT_PARAM = $00 define _SYS_CLK_FREQ = 50000000 define _OSC_FREQ = 50000000 define _SYS_CLK_SRC = 0 define _OSC_FREQ_MULT = 1 define __PLL_CTL0_INIT_PARAM = $40 define _zsl_g_clock_xdefine = 50000000 /* arch/z80/src/Makefile.zdsii will append target, object and library paths below */