79 lines
2.7 KiB
ReStructuredText
79 lines
2.7 KiB
ReStructuredText
======================================
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Coresight - HW Assisted Tracing on ARM
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======================================
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Overview
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--------
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Coresight is an umbrella of technologies allowing for the debugging of ARM
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based SoC. It includes solutions for JTAG and HW assisted tracing. This
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document is concerned with the latter.
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HW assisted tracing is becoming increasingly useful when dealing with systems
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that have many SoCs and other components like GPU and DMA engines. Developers
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can monitor the behavior of their software as it runs on the device, view
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real-time data about its execution, and identify and debug issues quickly.
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Coresight omponents are generally categorised as source, link and sinks.
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The source devices generats a compressed stream representing the processor
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instruction path based on tracing scenarios. The link devices are responsible
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for transferring the stream from the source device to the sink device. The sink
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devices serve as as endpoints to the coresight implementation, either storing
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the compressed stream in a memory buffer or creating an interface to the
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outside world where data can be transferred to a host without fear of filling
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up the onboard coresight memory buffer.
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refer to the following document for more details:
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https://developer.arm.com/documentation/102520/latest/
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Acronyms and Classification
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---------------------------
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Acronyms:
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PTM:
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Program Trace Macrocell
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ETM:
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Embedded Trace Macrocell
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STM:
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System trace Macrocell
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ETB:
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Embedded Trace Buffer
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ITM:
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Instrumentation Trace Macrocell
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TPIU:
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Trace Port Interface Unit
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TMC-ETR:
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Trace Memory Controller, configured as Embedded Trace Router
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TMC-ETF:
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Trace Memory Controller, configured as Embedded Trace FIFO
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Classification:
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Source:
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ETM, STM, ITM
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Link:
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Funnel, replicator, TMC-ETF
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Sinks:
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ETB, TPIU, TMC-ETR
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Framework and implementation
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----------------------------
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The coresight framework provides a central point to represent, configure and
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manage coresight devices on a platform. Any coresight compliant device can
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register with the framework for as long as they use the right APIs:
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.. c:function:: int coresight_register(FAR struct coresight_dev_s *csdev, FAR const struct coresight_desc_s *desc);
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.. c:function:: void coresight_unregister(FAR struct coresight_dev_s *csdev);
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``struct coresight_desc *desc`` describes the type of current coresight device
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and where it connects to. When all the coresight devices are registered,
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devices throught the tracing stream path can be enablea by calling:
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.. c:function:: int coresight_enable(FAR struct coresight_dev_s *srcdev, FAR struct coresight_dev_s *destdev);
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The ``coresight_enable`` function will build the path through srcdev and
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destdev according the ``struct coresight_desc *desc``.
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