ca39dc2e74
and move common math funtions to math32.h: div_round_up div_round_closest is_power_of_2 roundup_pow_of_two rounddown_pow_of_two Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
112 lines
3.6 KiB
C
112 lines
3.6 KiB
C
/****************************************************************************
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* drivers/clk/clk_phase.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/clk/clk_provider.h>
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#include "clk.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define to_clk_phase(_clk) (FAR struct clk_phase_s *)(_clk->private_data)
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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static int clk_phase_get_phase(FAR struct clk_s *clk)
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{
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FAR struct clk_phase_s *phase = to_clk_phase(clk);
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uint32_t val;
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val = (clk_read(phase->reg) >> phase->shift) & MASK(phase->width);
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return div_round_closest(360 * val, MASK(phase->width) + 1);
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}
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static int clk_phase_set_phase(FAR struct clk_s *clk, int degrees)
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{
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FAR struct clk_phase_s *phase = to_clk_phase(clk);
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uint32_t pha;
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uint32_t val;
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pha = div_round_closest((MASK(phase->width) + 1) * degrees, 360);
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if (pha > MASK(phase->width))
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{
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pha = MASK(phase->width);
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}
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if (phase->flags & CLK_PHASE_HIWORD_MASK)
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{
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val = MASK(phase->width) << (phase->shift + 16);
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}
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else
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{
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val = clk_read(phase->reg);
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val &= ~(MASK(phase->width) << phase->shift);
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}
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val |= pha << phase->shift;
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clk_write(phase->reg, val);
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return 0;
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}
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/****************************************************************************
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* Public Data
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****************************************************************************/
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const struct clk_ops_s g_clk_phase_ops =
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{
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.get_phase = clk_phase_get_phase,
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.set_phase = clk_phase_set_phase,
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};
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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FAR struct clk_s *clk_register_phase(FAR const char *name,
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FAR const char *parent_name,
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uint8_t flags, uint32_t reg,
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uint8_t shift, uint8_t width,
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uint8_t clk_phase_flags)
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{
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struct clk_phase_s phase;
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FAR const char **parent_names;
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uint8_t num_parents;
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parent_names = parent_name ? &parent_name : NULL;
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num_parents = parent_name ? 1 : 0;
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phase.reg = reg;
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phase.shift = shift;
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phase.width = width;
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phase.flags = clk_phase_flags;
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return clk_register(name, parent_names, num_parents, flags,
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&g_clk_phase_ops, &phase, sizeof(phase));
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}
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