204 lines
7.2 KiB
C
204 lines
7.2 KiB
C
/****************************************************************************
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* drivers/coresight/coresight_common.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __DRIVERS_CORESIGHT_CORESIGHT_COMMON_H
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#define __DRIVERS_CORESIGHT_CORESIGHT_COMMON_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <stdint.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Coresight registers
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* 0xF00 - 0xF9C: Management registers
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* 0xFA0 - 0xFA4: Management registers in PFTv1.0
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* Trace registers in PFTv1.1
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* 0xFA8 - 0xFFC: Management registers
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*/
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#define CORESIGHT_ITCTRL 0xf00
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#define CORESIGHT_CLAIMSET 0xfa0
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#define CORESIGHT_CLAIMCLR 0xfa4
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#define CORESIGHT_LAR 0xfb0
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#define CORESIGHT_LSR 0xfb4
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#define CORESIGHT_DEVARCH 0xfbc
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#define CORESIGHT_AUTHSTATUS 0xfb8
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#define CORESIGHT_DEVID 0xfc8
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#define CORESIGHT_DEVTYPE 0xfcc
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/* Register operations */
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#define coresight_put8(val, addr) \
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(*(FAR volatile uint8_t *)(addr) = (val))
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#define coresight_put16(val, addr) \
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(*(FAR volatile uint16_t *)(addr) = (val))
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#define coresight_put32(val, addr) \
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(*(FAR volatile uint32_t *)(addr) = (val))
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#define coresight_put64(val, addr) \
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(*(FAR volatile uint64_t *)(addr) = (val))
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#define coresight_get32(addr) \
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(*(FAR volatile uint32_t *)(addr))
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#define coresight_modify32(val, mask, addr) \
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coresight_put32((coresight_get32(addr) & ~(mask)) | \
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((val) & (mask)), (addr))
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: coresight_lock
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*
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* Description:
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* To ensure that the software being debugged can never access an unlocked
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* CoreSight component, a software monitor that accesses debug registers
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* must unlock the component before accessing any registers, and lock the
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* component again before exiting the monitor.
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*
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* Input Parameters:
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* addr - Base addr of the coresight device.
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*
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****************************************************************************/
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void coresight_lock(uintptr_t addr);
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/****************************************************************************
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* Name: coresight_unlock
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****************************************************************************/
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void coresight_unlock(uintptr_t addr);
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/****************************************************************************
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* Name: coresight_claim_device
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*
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* Description:
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* Claim the device for self-hosted usage to prevent an external tool from
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* touching this device.Use Protocol 3: Set private bit and check for race.
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*
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* Input Parameters:
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* addr - Base addr of the coresight device.
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*
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* Returned Value:
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* Zero on success; a negative value on failure.
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*
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****************************************************************************/
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int coresight_claim_device(uintptr_t addr);
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/****************************************************************************
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* Name: coresight_disclaim_device
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*
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* Description:
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* Disclaim the device, then an external tool can touch the device.
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*
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* Input Parameters:
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* addr - Base addr of the coresight device.
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*
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****************************************************************************/
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void coresight_disclaim_device(uintptr_t addr);
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/****************************************************************************
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* Name: coresight_get_cpu_trace_id
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*
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* Description:
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* Used to get an unique trace id associated with cpu id of an ETM
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* coresight device.
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*
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* Input Parameters:
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* cpu - CPU index to generate an unique trace id.
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*
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* Returned Value:
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* Unique trace id on success; a negative value on failure.
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*
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****************************************************************************/
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int coresight_get_cpu_trace_id(int cpu);
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/****************************************************************************
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* Name: coresight_get_system_trace_id
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*
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* Description:
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* Used to get an unique trace id of a STM coresight device. The trace ID
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* value for *ETM* tracers start at CPU_ID * 2 + 0x10, and Trace ID 0x00
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* and anything equal to or higher than 0x70 is reserved.
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*
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* Returned Value:
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* Unique trace id on success; a negative value on failure.
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*
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****************************************************************************/
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int coresight_get_system_trace_id(void);
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/****************************************************************************
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* Name: coresight_put_system_trace_id
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*
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* Description:
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* Release an allocated system trace ID.
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*
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* Input Parameters:
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* traceid - Traceid to be released.
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*
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****************************************************************************/
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void coresight_put_system_trace_id(int traceid);
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/****************************************************************************
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* Name: coresight_timeout
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*
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* Description:
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* Loop until a bitmask of register has changed to a specific value.
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*
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* Input Parameters:
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* addr - Base addr of the coresight device.
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* off - Register offset of the coresight device.
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* bitmask - Bitmask to be checked.
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* val - Value to be matched.
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*
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* Returned Value:
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* Zero on success; a negative value on failure.
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*
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****************************************************************************/
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int coresight_timeout(uint32_t val, uint32_t mask, uintptr_t addr);
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/****************************************************************************
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* Name: coresight_insert_barrier_packet
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*
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* Description:
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* When losing synchronisation a new barrier packet needs to be inserted at
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* the beginning of the data collected in a buffer. That way the decoder
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* knows that it needs to look for another sync sequence.
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*
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* Input Parameters:
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* buf - buffer that a new barrier packet inserts to.
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*
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****************************************************************************/
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void coresight_insert_barrier_packet(FAR void *buf);
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#endif /* __DRIVERS_CORESIGHT_CORESIGHT_COMMON_H */
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