2775cadcd2
-CONFIG_USEC_PER_TICK=10000 +CONFIG_USEC_PER_TICK=1000 A system timer with a 10 MS period is not sufficient to run the dual thread sporadic scheduler test since the timings in that test are also around 10 MS. Apparently there is a race condition when both sporadic thread's budgets complete on the same clock time. This change does not eliminate the race, but reduces its effect greatly.
54 lines
1.4 KiB
Plaintext
54 lines
1.4 KiB
Plaintext
#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_ARCH_FPU is not set
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# CONFIG_NSH_ARGCAT is not set
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# CONFIG_NSH_CMDOPT_HEXDUMP is not set
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# CONFIG_NSH_CMDPARMS is not set
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CONFIG_ARCH="arm"
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CONFIG_ARCH_BOARD="stm32f4discovery"
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CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y
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CONFIG_ARCH_BUTTONS=y
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CONFIG_ARCH_CHIP="stm32"
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CONFIG_ARCH_CHIP_STM32=y
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CONFIG_ARCH_CHIP_STM32F407VG=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_BOARD_LATE_INITIALIZE=y
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CONFIG_BOARD_LOOPSPERMSEC=16717
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CONFIG_BUILTIN=y
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CONFIG_FS_PROCFS=y
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CONFIG_HOST_WINDOWS=y
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CONFIG_INTELHEX_BINARY=y
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CONFIG_MAX_TASKS=16
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CONFIG_MM_REGIONS=2
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_LINELEN=64
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CONFIG_NSH_READLINE=y
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_RAM_SIZE=114688
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CONFIG_RAM_START=0x20000000
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CONFIG_RAW_BINARY=y
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CONFIG_SCHED_SPORADIC=y
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CONFIG_SCHED_SPORADIC_MAXREPL=5
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CONFIG_SCHED_WAITPID=y
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CONFIG_SDCLONE_DISABLE=y
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CONFIG_START_DAY=6
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CONFIG_START_MONTH=3
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CONFIG_START_YEAR=2021
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CONFIG_STM32_JTAG_SW_ENABLE=y
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CONFIG_STM32_PWR=y
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CONFIG_STM32_SPI1=y
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CONFIG_STM32_USART6=y
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CONFIG_SYSTEM_NSH=y
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CONFIG_TESTING_OSTEST=y
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CONFIG_USART6_RXBUFSIZE=128
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CONFIG_USART6_SERIAL_CONSOLE=y
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CONFIG_USART6_TXBUFSIZE=128
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CONFIG_USEC_PER_TICK=1000
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CONFIG_USER_ENTRYPOINT="nsh_main"
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