1008 lines
28 KiB
C
1008 lines
28 KiB
C
/****************************************************************************
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* arch/arm/src/str71x/str71x_serial.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <string.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/fs/ioctl.h>
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#include <nuttx/serial/serial.h>
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#include "chip.h"
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#include "arm_internal.h"
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#include "str71x.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Some sanity checks *******************************************************/
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/* Is there a UART enabled? */
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#if !defined(CONFIG_STR71X_UART0) && !defined(CONFIG_STR71X_UART1) && \
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!defined(CONFIG_STR71X_UART2) && !defined(CONFIG_STR71X_UART3)
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# error "No UARTs enabled"
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#endif
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/* Is there a serial console? */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE) || defined(CONFIG_UART1_SERIAL_CONSOLE) ||\
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defined(CONFIG_UART2_SERIAL_CONSOLE) || defined(CONFIG_UART3_SERIAL_CONSOLE)
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# define HAVE_CONSOLE 1
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#else
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# undef HAVE_CONSOLE
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#endif
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/* If we are not using the serial driver for the console, then we
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* still must provide some minimal implementation of up_putc().
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*/
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#ifdef USE_SERIALDRIVER
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/* Which UART with be tty0/console and which tty1? tty2? tty3? */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE) || !defined(HAVE_CONSOLE)
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# ifdef HAVE_CONSOLE
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# ifndef CONFIG_STR71X_UART0
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# error "UART0 not selected, cannot be console"
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# endif
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# define CONSOLE_DEV g_uart0port /* UART0 is console */
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# endif
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# define TTYS0_DEV g_uart0port /* UART0 is tty0 */
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# if defined(CONFIG_STR71X_UART1)
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# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
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# if defined(CONFIG_STR71X_UART2)
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS3_DEV g_uart3port /* UART3 is tty3 */
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# endif
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif defined(CONFIG_STR71X_UART2)
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# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS1_DEV g_uart3port /* UART3 is tty1 */
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# endif
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# ifndef CONFIG_STR71X_UART1
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# error "UART1 not selected, cannot be console"
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# endif
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# define CONSOLE_DEV g_uart1port /* UART1 is console */
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# define TTYS0_DEV g_uart1port /* UART1 is tty0 */
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# if CONFIG_STR71X_UART0
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# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
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# if CONFIG_STR71X_UART2
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS3_DEV g_uart3port /* UART3 is tty3 */
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# endif
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif CONFIG_STR71X_UART2
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# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS1_DEV g_uart3port /* UART3 is tty1 */
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# endif
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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# ifndef CONFIG_STR71X_UART2
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# error "UART2 not selected, cannot be console"
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# endif
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# define CONSOLE_DEV g_uart2port /* UART2 is console */
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# define TTYS0_DEV g_uart2port /* UART2 is tty0 */
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# if CONFIG_STR71X_UART0
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# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
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# if defined(CONFIG_STR71X_UART1)
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# define TTYS2_DEV g_uart1port /* UART1 is tty2 */
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS3_DEV g_uart3port /* UART3 is tty3 */
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# endif
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif defined(CONFIG_STR71X_UART1)
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# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
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# if defined(CONFIG_STR71X_UART3)
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# define TTYS2_DEV g_uart3port /* UART3 is tty2 */
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# endif
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# elif defined(CONFIG_STR71X_UART3)
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# define TTYS1_DEV g_uart3port /* UART3 is tty1 */
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# endif
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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# ifndef CONFIG_STR71X_UART3
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# error "UART3 not selected, cannot be console"
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# endif
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# define CONSOLE_DEV g_uart3port /* UART3 is console */
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# define TTYS0_DEV g_uart3port /* UART3 is tty0 */
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# if CONFIG_STR71X_UART0
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# define TTYS1_DEV g_uart0port /* UART0 is tty1 */
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# if defined(CONFIG_STR71X_UART1)
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# define TTYS2_DEV g_uart1port /* UART1 is tty2 */
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# if defined(CONFIG_STR71X_UART2)
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# define TTYS3_DEV g_uart2port /* UART2 is tty3 */
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# endif
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# elif defined(CONFIG_STR71X_UART2)
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# endif
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# elif defined(CONFIG_STR71X_UART1)
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# define TTYS1_DEV g_uart1port /* UART1 is tty1 */
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# if defined(CONFIG_STR71X_UART2)
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# define TTYS2_DEV g_uart2port /* UART2 is tty2 */
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# endif
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# elif defined(CONFIG_STR71X_UART2)
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# define TTYS1_DEV g_uart2port /* UART2 is tty1 */
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# endif
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#else
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# warning "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
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#endif
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/* Select RX interrupt enable bits. There are two models: (1) We interrupt
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* when each character is received. Or, (2) we interrupt when either the Rx
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* FIFO is half full, OR a timeout occurs with data in the RX FIFO. The
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* later does not work because there seems to be a disconnect -- we can get
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* the FIFO half full interrupt with no data in the RX buffer.
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*/
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#if 1
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# define RXENABLE_BITS (STR71X_UARTIER_RHF|STR71X_UARTIER_TIMEOUTNE)
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#else
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# define RXENABLE_BITS STR71X_UARTIER_RNE
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#endif
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/* Which ever model is used, there seems to be some timing disconnects
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* between Rx FIFO not full and Rx FIFO half full indications. Best bet
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* is to use both.
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*/
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#define RXAVAILABLE_BITS (STR71X_UARTSR_RNE|STR71X_UARTSR_RHF)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct up_dev_s
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{
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uint32_t uartbase; /* Base address of UART registers */
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uint32_t baud; /* Configured baud */
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uint16_t ier; /* Saved IER value */
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uint16_t sr; /* Saved SR value (only used during interrupt processing) */
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uint8_t irq; /* IRQ associated with this UART */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (7 or 8) */
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bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* Internal Helpers */
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static inline uint16_t up_serialin(struct up_dev_s *priv, int offset);
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static inline void up_serialout(struct up_dev_s *priv, int offset,
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uint16_t value);
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static inline void up_disableuartint(struct up_dev_s *priv, uint16_t *ier);
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static inline void up_restoreuartint(struct up_dev_s *priv, uint16_t ier);
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#ifdef HAVE_CONSOLE
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static inline void up_waittxnotfull(struct up_dev_s *priv);
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#endif
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/* Serial Driver Methods */
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static int up_setup(struct uart_dev_s *dev);
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static void up_shutdown(struct uart_dev_s *dev);
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static int up_attach(struct uart_dev_s *dev);
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static void up_detach(struct uart_dev_s *dev);
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static int up_interrupt(int irq, void *context, void *arg);
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static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
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static int up_receive(struct uart_dev_s *dev, unsigned int *status);
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static void up_rxint(struct uart_dev_s *dev, bool enable);
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static bool up_rxavailable(struct uart_dev_s *dev);
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static void up_send(struct uart_dev_s *dev, int ch);
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static void up_txint(struct uart_dev_s *dev, bool enable);
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static bool up_txready(struct uart_dev_s *dev);
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static bool up_txempty(struct uart_dev_s *dev);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct uart_ops_s g_uart_ops =
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{
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.setup = up_setup,
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.shutdown = up_shutdown,
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.attach = up_attach,
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.detach = up_detach,
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.ioctl = up_ioctl,
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.receive = up_receive,
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.rxint = up_rxint,
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.rxavailable = up_rxavailable,
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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.rxflowcontrol = NULL,
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#endif
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.send = up_send,
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.txint = up_txint,
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.txready = up_txready,
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.txempty = up_txempty,
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};
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/* I/O buffers */
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#ifdef CONFIG_STR71X_UART0
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static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE];
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static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE];
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#endif
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#ifdef CONFIG_STR71X_UART1
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static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
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static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
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#endif
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#ifdef CONFIG_STR71X_UART2
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static char g_uart2rxbuffer[CONFIG_UART1_RXBUFSIZE];
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static char g_uart2txbuffer[CONFIG_UART1_TXBUFSIZE];
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#endif
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#ifdef CONFIG_STR71X_UART3
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static char g_uart3rxbuffer[CONFIG_UART1_RXBUFSIZE];
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static char g_uart3txbuffer[CONFIG_UART1_TXBUFSIZE];
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#endif
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/* This describes the state of the STR71X uart0 port. */
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#ifdef CONFIG_STR71X_UART0
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static struct up_dev_s g_uart0priv =
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{
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.uartbase = STR71X_UART0_BASE,
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.baud = CONFIG_UART0_BAUD,
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.irq = STR71X_IRQ_UART0,
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.parity = CONFIG_UART0_PARITY,
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.bits = CONFIG_UART0_BITS,
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.stopbits2 = CONFIG_UART0_2STOP,
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};
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static uart_dev_t g_uart0port =
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{
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.recv =
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{
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.size = CONFIG_UART0_RXBUFSIZE,
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.buffer = g_uart0rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART0_TXBUFSIZE,
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.buffer = g_uart0txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart0priv,
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};
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#endif
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/* This describes the state of the STR71X uart1 port. */
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#ifdef CONFIG_STR71X_UART1
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static struct up_dev_s g_uart1priv =
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{
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.uartbase = STR71X_UART1_BASE,
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.baud = CONFIG_UART1_BAUD,
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.irq = STR71X_IRQ_UART1,
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.parity = CONFIG_UART1_PARITY,
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.bits = CONFIG_UART1_BITS,
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.stopbits2 = CONFIG_UART1_2STOP,
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};
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static uart_dev_t g_uart1port =
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{
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.recv =
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{
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.size = CONFIG_UART1_RXBUFSIZE,
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.buffer = g_uart1rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART1_TXBUFSIZE,
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.buffer = g_uart1txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart1priv,
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};
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#endif
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/* This describes the state of the STR71X uart2 port. */
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#ifdef CONFIG_STR71X_UART2
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static struct up_dev_s g_uart2priv =
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{
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.uartbase = STR71X_UART2_BASE,
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.baud = CONFIG_UART2_BAUD,
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.irq = STR71X_IRQ_UART2,
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.parity = CONFIG_UART2_PARITY,
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.bits = CONFIG_UART2_BITS,
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.stopbits2 = CONFIG_UART2_2STOP,
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};
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static uart_dev_t g_uart2port =
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{
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.recv =
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{
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.size = CONFIG_UART2_RXBUFSIZE,
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.buffer = g_uart2rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART2_TXBUFSIZE,
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.buffer = g_uart2txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart2priv,
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};
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#endif
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/* This describes the state of the STR71X uart3 port. */
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#ifdef CONFIG_STR71X_UART3
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static struct up_dev_s g_uart3priv =
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{
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.uartbase = STR71X_UART3_BASE,
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.baud = CONFIG_UART3_BAUD,
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.irq = STR71X_IRQ_UART3,
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.parity = CONFIG_UART3_PARITY,
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.bits = CONFIG_UART3_BITS,
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.stopbits2 = CONFIG_UART3_2STOP,
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};
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static uart_dev_t g_uart3port =
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{
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.recv =
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{
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.size = CONFIG_UART3_RXBUFSIZE,
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.buffer = g_uart3rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART3_TXBUFSIZE,
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.buffer = g_uart3txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart3priv,
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_serialin
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****************************************************************************/
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static inline uint16_t up_serialin(struct up_dev_s *priv, int offset)
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{
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return getreg16(priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_serialout
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****************************************************************************/
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static inline void up_serialout(struct up_dev_s *priv, int offset,
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uint16_t value)
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{
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putreg16(value, priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_disableuartint
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****************************************************************************/
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static inline void up_disableuartint(struct up_dev_s *priv, uint16_t *ier)
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{
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if (ier)
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{
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*ier = priv->ier;
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}
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priv->ier = 0;
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up_serialout(priv, STR71X_UART_IER_OFFSET, 0);
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}
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/****************************************************************************
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* Name: up_restoreuartint
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****************************************************************************/
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static inline void up_restoreuartint(struct up_dev_s *priv, uint16_t ier)
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{
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priv->ier = ier;
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up_serialout(priv, STR71X_UART_IER_OFFSET, ier);
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}
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/****************************************************************************
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* Name: up_waittxnotfull
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****************************************************************************/
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#ifdef HAVE_CONSOLE
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static inline void up_waittxnotfull(struct up_dev_s *priv)
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{
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int tmp;
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/* Limit how long we will wait for the TX available condition */
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for (tmp = 1000 ; tmp > 0 ; tmp--)
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{
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/* Check TX FIFO is full */
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if ((up_serialin(priv, STR71X_UART_SR_OFFSET) & STR71X_UARTSR_TF) == 0)
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{
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/* The TX FIFO is not full... return */
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break;
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}
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}
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}
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#endif
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/****************************************************************************
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* Name: up_setup
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*
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* Description:
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* Configure the UART baud, bits, parity, fifos, etc. This
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* method is called the first time that the serial port is
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* opened.
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*
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****************************************************************************/
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static int up_setup(struct uart_dev_s *dev)
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{
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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uint32_t divisor;
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uint32_t baud;
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uint16_t cr;
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/* Set the BAUD rate */
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|
|
|
divisor = 16 * priv->baud;
|
|
baud = (STR71X_PCLK1 + divisor / 2) / divisor;
|
|
up_serialout(priv, STR71X_UART_BR_OFFSET, baud);
|
|
|
|
/* Get mode setting */
|
|
|
|
cr = STR71X_UARTCR_RUN | STR71X_UARTCR_RXENABLE | STR71X_UARTCR_FIFOENABLE;
|
|
|
|
if (priv->bits == 7)
|
|
{
|
|
DEBUGASSERT(priv->parity != 0);
|
|
cr |= STR71X_UARTCR_MODE7BITP;
|
|
}
|
|
else if (priv->bits == 8)
|
|
{
|
|
if (priv->parity)
|
|
{
|
|
cr |= STR71X_UARTCR_MODE8BITP;
|
|
}
|
|
else
|
|
{
|
|
cr |= STR71X_UARTCR_MODE8BIT;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
DEBUGASSERT(priv->bits == 9 && priv->parity == 0);
|
|
cr |= STR71X_UARTCR_MODE9BIT;
|
|
}
|
|
|
|
if (priv->parity == 1)
|
|
{
|
|
cr |= STR71X_UARTCR_PARITYODD;
|
|
}
|
|
|
|
if (priv->stopbits2)
|
|
{
|
|
cr |= STR71X_UARTCR_STOPBIT20;
|
|
}
|
|
else
|
|
{
|
|
cr |= STR71X_UARTCR_STOPBIT10;
|
|
}
|
|
|
|
up_serialout(priv, STR71X_UART_CR_OFFSET, cr);
|
|
|
|
/* Clear FIFOs */
|
|
|
|
up_serialout(priv, STR71X_UART_TXRSTR_OFFSET, 0xffff);
|
|
up_serialout(priv, STR71X_UART_RXRSTR_OFFSET, 0xffff);
|
|
|
|
/* We will take RX interrupts on either the FIFO half full or upon
|
|
* a timeout. The timeout is based upon BAUD rate ticks
|
|
*/
|
|
|
|
up_serialout(priv, STR71X_UART_TOR_OFFSET, 50);
|
|
|
|
/* Set up the IER */
|
|
|
|
priv->ier = up_serialin(priv, STR71X_UART_IER_OFFSET);
|
|
#endif
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_shutdown
|
|
*
|
|
* Description:
|
|
* Disable the UART. This method is called when the serial
|
|
* port is closed
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_shutdown(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
up_disableuartint(priv, NULL);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_attach
|
|
*
|
|
* Description:
|
|
* Configure the UART to operation in interrupt driven mode. This method
|
|
* is called when the serial port is opened. Normally, this is just after
|
|
* the setup() method is called, however, the serial console may operate in
|
|
* a non-interrupt driven mode during the boot phase.
|
|
*
|
|
* RX and TX interrupts are not enabled when by the attach method (unless
|
|
* the hardware supports multiple levels of interrupt enabling). The RX
|
|
* and TX interrupts are not enabled until the txint() and rxint() methods
|
|
* are called.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_attach(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
int ret;
|
|
|
|
/* Attach and enable the IRQ */
|
|
|
|
ret = irq_attach(priv->irq, up_interrupt, dev);
|
|
if (ret == OK)
|
|
{
|
|
/* Enable the interrupt (RX and TX interrupts are still disabled
|
|
* in the UART
|
|
*/
|
|
|
|
up_enable_irq(priv->irq);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_detach
|
|
*
|
|
* Description:
|
|
* Detach UART interrupts. This method is called when the serial port is
|
|
* closed normally just before the shutdown method is called. The
|
|
* exception is the serial console which is never shutdown.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_detach(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
up_disable_irq(priv->irq);
|
|
irq_detach(priv->irq);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_interrupt
|
|
*
|
|
* Description:
|
|
* This is the UART interrupt handler. It will be invoked
|
|
* when an interrupt received on the 'irq' It should call
|
|
* uart_transmitchars or uart_receivechar to perform the
|
|
* appropriate data transfers. The interrupt handling logic\
|
|
* must be able to map the 'irq' number into the appropriate
|
|
* uart_dev_s structure in order to call these functions.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_interrupt(int irq, void *context, void *arg)
|
|
{
|
|
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
|
|
struct up_dev_s *priv;
|
|
int passes;
|
|
bool handled;
|
|
|
|
DEBUGASSERT(dev != NULL && dev->priv != NULL);
|
|
priv = (struct up_dev_s *)dev->priv;
|
|
|
|
/* Loop until there are no characters to be transferred or,
|
|
* until we have been looping for a long time.
|
|
*/
|
|
|
|
handled = true;
|
|
for (passes = 0; passes < 256 && handled; passes++)
|
|
{
|
|
handled = false;
|
|
|
|
/* Get the current UART status */
|
|
|
|
priv->sr = up_serialin(priv, STR71X_UART_SR_OFFSET);
|
|
|
|
/* Handle incoming, receive bytes (with or without timeout) */
|
|
|
|
if ((priv->sr & RXAVAILABLE_BITS) != 0 && /* Data available in Rx FIFO */
|
|
(priv->ier & RXENABLE_BITS) != 0) /* Rx FIFO interrupts enabled */
|
|
{
|
|
/* Rx buffer not empty ... process incoming bytes */
|
|
|
|
uart_recvchars(dev);
|
|
handled = true;
|
|
}
|
|
|
|
/* Handle outgoing, transmit bytes */
|
|
|
|
if ((priv->sr & STR71X_UARTSR_TF) == 0 && /* Tx FIFO not full */
|
|
(priv->ier & STR71X_UARTIER_THE) != 0) /* Tx Half empty interrupt enabled */
|
|
{
|
|
/* Tx FIFO not full ... process outgoing bytes */
|
|
|
|
uart_xmitchars(dev);
|
|
handled = true;
|
|
}
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_ioctl
|
|
*
|
|
* Description:
|
|
* All ioctl calls will be routed through this method
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
|
|
{
|
|
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
|
|
struct inode *inode = filep->f_inode;
|
|
struct uart_dev_s *dev = inode->i_private;
|
|
#endif
|
|
int ret = OK;
|
|
|
|
switch (cmd)
|
|
{
|
|
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
|
|
case TIOCSERGSTRUCT:
|
|
{
|
|
struct up_dev_s *user = (struct up_dev_s *)arg;
|
|
if (!user)
|
|
{
|
|
ret = -EINVAL;
|
|
}
|
|
else
|
|
{
|
|
memcpy(user, dev, sizeof(struct up_dev_s));
|
|
}
|
|
}
|
|
break;
|
|
#endif
|
|
|
|
default:
|
|
ret = -ENOTTY;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_receive
|
|
*
|
|
* Description:
|
|
* Called (usually) from the interrupt level to receive one
|
|
* character from the UART. Error bits associated with the
|
|
* receipt are provided in the return 'status'.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_receive(struct uart_dev_s *dev, unsigned int *status)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
uint16_t rxbufr;
|
|
|
|
rxbufr = up_serialin(priv, STR71X_UART_RXBUFR_OFFSET);
|
|
*status = (uint32_t)priv->sr << 16 | rxbufr;
|
|
return rxbufr & 0xff;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_rxint
|
|
*
|
|
* Description:
|
|
* Call to enable or disable RX interrupts
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_rxint(struct uart_dev_s *dev, bool enable)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
if (enable)
|
|
{
|
|
/* Receive an interrupt when the Rx FIFO is half full (or if a timeout
|
|
* occurs while the Rx FIFO is not empty).
|
|
*/
|
|
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
priv->ier |= RXENABLE_BITS;
|
|
#endif
|
|
}
|
|
else
|
|
{
|
|
priv->ier &= ~RXENABLE_BITS;
|
|
}
|
|
|
|
up_serialout(priv, STR71X_UART_IER_OFFSET, priv->ier);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_rxavailable
|
|
*
|
|
* Description:
|
|
* Return true if the receive fifo is not empty
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_rxavailable(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
return ((up_serialin(priv, STR71X_UART_SR_OFFSET) &
|
|
RXAVAILABLE_BITS) != 0);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_send
|
|
*
|
|
* Description:
|
|
* This method will send one byte on the UART
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_send(struct uart_dev_s *dev, int ch)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16_t)ch);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_txint
|
|
*
|
|
* Description:
|
|
* Call to enable or disable TX interrupts
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_txint(struct uart_dev_s *dev, bool enable)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
if (enable)
|
|
{
|
|
/* Set to receive an interrupt when the TX fifo is half emptied */
|
|
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
priv->ier |= STR71X_UARTSR_THE;
|
|
#endif
|
|
}
|
|
else
|
|
{
|
|
/* Disable the TX interrupt */
|
|
|
|
priv->ier &= ~STR71X_UARTSR_THE;
|
|
}
|
|
|
|
up_serialout(priv, STR71X_UART_IER_OFFSET, priv->ier);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_txready
|
|
*
|
|
* Description:
|
|
* Return true if the tranmsit fifo is not full
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_txready(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
return ((up_serialin(priv, STR71X_UART_SR_OFFSET) &
|
|
STR71X_UARTSR_TF) == 0);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_txempty
|
|
*
|
|
* Description:
|
|
* Return true if the transmit fifo is empty
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_txempty(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
return ((up_serialin(priv, STR71X_UART_SR_OFFSET) &
|
|
STR71X_UARTSR_TE) != 0);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Public Functions
|
|
****************************************************************************/
|
|
|
|
#ifdef USE_EARLYSERIALINIT
|
|
|
|
/****************************************************************************
|
|
* Name: arm_earlyserialinit
|
|
*
|
|
* Description:
|
|
* Performs the low level UART initialization early in
|
|
* debug so that the serial console will be available
|
|
* during bootup. This must be called before arm_serialinit.
|
|
*
|
|
****************************************************************************/
|
|
|
|
void arm_earlyserialinit(void)
|
|
{
|
|
/* NOTE: All GPIO configuration for the UARTs was performed in
|
|
* up_lowsetup
|
|
*/
|
|
|
|
/* Disable all UARTS */
|
|
|
|
up_disableuartint(TTYS0_DEV.priv, NULL);
|
|
#ifdef TTYS1_DEV
|
|
up_disableuartint(TTYS1_DEV.priv, NULL);
|
|
#endif
|
|
#ifdef TTYS2_DEV
|
|
up_disableuartint(TTYS2_DEV.priv, NULL);
|
|
#endif
|
|
#ifdef TTYS3_DEV
|
|
up_disableuartint(TTYS3_DEV.priv, NULL);
|
|
#endif
|
|
|
|
/* Configuration whichever one is the console */
|
|
|
|
#ifdef HAVE_CONSOLE
|
|
CONSOLE_DEV.isconsole = true;
|
|
up_setup(&CONSOLE_DEV);
|
|
#endif
|
|
}
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Name: arm_serialinit
|
|
*
|
|
* Description:
|
|
* Register serial console and serial ports. This assumes
|
|
* that arm_earlyserialinit was called previously.
|
|
*
|
|
****************************************************************************/
|
|
|
|
void arm_serialinit(void)
|
|
{
|
|
/* Register the console */
|
|
|
|
#ifdef HAVE_CONSOLE
|
|
uart_register("/dev/console", &CONSOLE_DEV);
|
|
#endif
|
|
|
|
/* Register all UARTs */
|
|
|
|
uart_register("/dev/ttyS0", &TTYS0_DEV);
|
|
#ifdef TTYS1_DEV
|
|
uart_register("/dev/ttyS1", &TTYS1_DEV);
|
|
#endif
|
|
#ifdef TTYS2_DEV
|
|
uart_register("/dev/ttyS2", &TTYS2_DEV);
|
|
#endif
|
|
#ifdef TTYS3_DEV
|
|
uart_register("/dev/ttyS3", &TTYS3_DEV);
|
|
#endif
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_putc
|
|
*
|
|
* Description:
|
|
* Provide priority, low-level access to support OS debug writes
|
|
*
|
|
****************************************************************************/
|
|
|
|
int up_putc(int ch)
|
|
{
|
|
#ifdef HAVE_CONSOLE
|
|
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
|
|
uint16_t ier;
|
|
|
|
up_disableuartint(priv, &ier);
|
|
up_waittxnotfull(priv);
|
|
up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16_t)ch);
|
|
|
|
/* Check for LF */
|
|
|
|
if (ch == '\n')
|
|
{
|
|
/* Add CR */
|
|
|
|
up_waittxnotfull(priv);
|
|
up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16_t)'\r');
|
|
}
|
|
|
|
up_waittxnotfull(priv);
|
|
up_restoreuartint(priv, ier);
|
|
#endif
|
|
return ch;
|
|
}
|
|
|
|
#else /* USE_SERIALDRIVER */
|
|
|
|
/****************************************************************************
|
|
* Name: up_putc
|
|
*
|
|
* Description:
|
|
* Provide priority, low-level access to support OS debug writes
|
|
*
|
|
****************************************************************************/
|
|
|
|
int up_putc(int ch)
|
|
{
|
|
#ifdef HAVE_CONSOLE
|
|
/* Check for LF */
|
|
|
|
if (ch == '\n')
|
|
{
|
|
/* Add CR */
|
|
|
|
arm_lowputc('\r');
|
|
}
|
|
|
|
arm_lowputc(ch);
|
|
#endif
|
|
return ch;
|
|
}
|
|
|
|
#endif /* USE_SERIALDRIVER */
|