299 lines
12 KiB
C
299 lines
12 KiB
C
/****************************************************************************
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* arch/arm/src/lpc43xx/lpc43_allocateheap.c
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*
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* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/userspace.h>
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#include <arch/board/board.h>
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#include "chip.h"
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#include "up_arch.h"
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#include "up_internal.h"
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#include "lpc43_emacram.h"
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#include "lpc43_usbram.h"
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/****************************************************************************
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* Private Definitions
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****************************************************************************/
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/* Get customizations for each supported chip.
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*
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* SRAM Resources
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* --------------------- -------- ------- ------- ------- ------- -------
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* Local SRAM LPC4310 LPC4320 LPC4330 LPC4350 LPC4353 LPC4357
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* --------------------- -------- ------- ------- ------- ------- -------
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* BANK 0 (0x1000 0000) 96Kb 96Kb 128Kb 128Kb 32Kb 32Kb
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* BANK 1 (0x1008 0000) 40Kb 40Kb 72Kb 72Kb 40Kb 40Kb
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* --------------------- -------- ------- ------- ------- ------- -------
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* SUBTOTAL 136Kb 136Kb 200Kb 200Kb 72Kb 72Kb
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* --------------------- -------- ------- ------- ------- ------- -------
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* AHB SRAM LPC4310 LPC4320 LPC4330 LPC4350 LPC4353 LPC4357
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* --------------------- -------- ------- ------- ------- ------- -------
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* BANK 0 (0x2000 0000) 16Kb 48Kb 48Kb 48Kb 48Kb 48Kb
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* BANK 1 (0x2000 8000) NOTE 1 NOTE 1 NOTE 1 NOTE 1 NOTE 1
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* BANK 2 (0x2000 c000) 16Kb 16Kb 16Kb 16Kb 16Kb 16Kb
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* --------------------- -------- ------- ------- ------- ------- -------
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* SUBTOTAL 32Kb 64Kb 64Kb 64Kb 64Kb 64Kb
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* --------------------- -------- ------- ------- ------- ------- -------
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* TOTAL 168Kb 200Kb 264Kb 264Kb 136Kb 136Kb
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* --------------------- -------- ------- ------- ------- ------- -------
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*
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* --------------------- -------- ------- ------- ------- ------- -------
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* FLASH LPC4310 LPC4320 LPC4330 LPC4350 LPC4353 LPC4357
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* --------------------- -------- ------- ------- ------- ------- -------
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* BANK A (0x1a00 0000) 256Kb 512Kb
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* BANK B (0x1b00 8000) 256Kb 512Kb
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* --------------------- -------- ------- ------- ------- ------- -------
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* TOTAL None None None None 512Kb 1024Kb
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* --------------------- -------- ------- ------- ------- ------- -------
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*
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* NOTE 1: The 64Kb of AHB of SRAM on the LPC4350/30/20 span all AHB SRAM
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* banks but are treated as two banks of 48 an 16Kb by the NuttX memory
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* manager. This gives some symmetry to all of the members of the family.
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*/
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/* Configuration ************************************************************/
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/* Two configurations are supported:
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*
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* Configuration A:
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* Program memory = FLASH
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* Data memory = Local RAM Bank 0
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* Additional regions = Local RAM Bank 1 + AHB SRAM (exluding DMA buffers)
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*
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* Configuration B:
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* Program memory = Local RAM Bank 0
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* Data memory = Local RAM Bank 1
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* Additional regions = AHB SRAM (exluding DMA buffers)
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*
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* This file supports only memory configuration A.
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*
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* These should be defined in the memory map header file:
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*
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* LPC43_LOCSRAM_BANK0_BASE 0x10000000
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* LPC43_LOCSRAM_BANK1_BASE 0x10080000
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* LPC43_AHBSRAM_BANK0_BASE 0x20000000
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* LPC43_AHBSRAM_BANK1_BASE 0x20008000
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* LPC43_AHBSRAM_BANK2_BASE 0x2000c000
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*
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* These should be defined for the specific chip in the chip.h header file.
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* The value will be defined to be zero in size of the bank does not exist.
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* If two banks are contiguous, the combined size will be added to the
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* first bank and the size of the second bank will be defined to be zero.
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*
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* LPC43_LOCSRAM_BANK0_SIZE
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* LPC43_LOCSRAM_BANK1_SIZE
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* LPC43_AHBSRAM_BANK0_SIZE
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* LPC43_AHBSRAM_BANK1_SIZE
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* LPC43_AHBSRAM_BANK2_SIZE
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*
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* The config.h file will define only:
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*
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* CONFIG_RAM_START = The start of the data RAM region which may be
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* either local SRAM bank 0 (Configuration A) or 1 (Configuration B).
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* CONFIG_RAM_START = The size of the data RAM region.
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* CONFIG_RAM_END = The sum of the above
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*/
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/* Check for Configuration A. */
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#ifndef CONFIG_LPC43_BOOT_SRAM
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/* Configuration A */
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/* CONFIG_RAM_START should be set to the base of AHB SRAM, local 0. */
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# if CONFIG_RAM_START != LPC43_LOCSRAM_BANK0_BASE
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# error "CONFIG_RAM_START must be set to the base address of AHB SRAM Bank 0"
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# endif
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/* The configured RAM size should be equal to the size of local SRAM Bank 0 */
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# if CONFIG_RAM_SIZE != LPC43_LOCSRAM_BANK0_SIZE
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# error "CONFIG_RAM_SIZE must be set to size of AHB SRAM Bank 0"
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# endif
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/* Now we can assign all of the memory regions for configuration A */
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# define MM_REGION1_BASE LPC43_LOCSRAM_BANK0_BASE
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# define MM_REGION1_SIZE LPC43_LOCSRAM_BANK0_SIZE
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# define MM_REGION2_BASE LPC43_LOCSRAM_BANK1_BASE
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# define MM_REGION2_SIZE LPC43_LOCSRAM_BANK1_SIZE
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# define MM_REGION3_BASE LPC43_AHBSRAM_BANK0_BASE
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# define MM_REGION3_SIZE LPC43_AHBSRAM_BANK0_SIZE
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#else
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/* Configuration B */
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/* CONFIG_RAM_START should be set to the base of local SRAM, bank 1. */
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# if CONFIG_RAM_START != LPC43_LOCSRAM_BANK1_BASE
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# error "CONFIG_RAM_START must be set to the base address of AHB SRAM Bank 0"
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# endif
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/* The configured RAM size should be equal to the size of local SRAM Bank 1 */
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# if CONFIG_RAM_SIZE != LPC43_LOCSRAM_BANK1_SIZE
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# error "CONFIG_RAM_SIZE must be set to size of AHB SRAM Bank 0"
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# endif
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/* Now we can assign all of the memory regions for configuration B */
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# define MM_REGION1_BASE LPC43_LOCSRAM_BANK1_BASE
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# define MM_REGION1_SIZE LPC43_LOCSRAM_BANK1_SIZE
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# define MM_REGION2_BASE LPC43_AHBSRAM_BANK0_BASE
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# define MM_REGION2_SIZE LPC43_AHBSRAM_BANK0_SIZE
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# undef MM_REGION3_BASE
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# undef MM_REGION3_SIZE
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#endif
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#define MM_DMAREGION_BASE LPC43_AHBSRAM_BANK2_BASE
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#define MM_DMAREGION_SIZE LPC43_AHBSRAM_BANK2_SIZE
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/* Figure out how much heap we have in the DMA region that is not being
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* used by USB and/or Ethernet (if any).
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*/
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#warning "Missing Logic"
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#define MM_DMAHEAP_BASE MM_DMAREGION_BASE /* For now... use it all */
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#define MM_DMAHEAP_SIZE MM_DMAREGION_SIZE
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/* _sbss is the start of the BSS region (see the linker script) _ebss is the
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* end of the BSS regsion (see the linker script). The idle task stack starts
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* at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE. The IDLE
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* thread is the thread that the system boots on and, eventually, becomes the
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* idle, do nothing task that runs only when there is nothing else to run.
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* The heap continues from there until the configured end of memory.
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* g_idle_topstack is the beginning of this heap region (not necessarily aligned).
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*/
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const uint32_t g_idle_topstack = (uint32_t)&_ebss + CONFIG_IDLETHREAD_STACKSIZE;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_allocate_heap
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*
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* Description:
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* This function will be called to dynamically set aside the heap region.
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*
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* For the kernel build (CONFIG_BUILD_PROTECTED=y) with both kernel- and
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* user-space heaps (CONFIG_MM_KERNEL_HEAP=y), this function provides the
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* size of the unprotected, user-space heap.
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*
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* If a protected kernel-space heap is provided, the kernel heap must be
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* allocated (and protected) by an analogous up_allocate_kheap().
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*
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****************************************************************************/
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void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
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{
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/* Start with the first SRAM region */
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board_led_on(LED_HEAPALLOCATE);
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*heap_start = (FAR void*)g_idle_topstack;
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*heap_size = CONFIG_RAM_END - g_idle_topstack;
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}
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/************************************************************************
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* Name: up_addregion
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*
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* Description:
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* Memory may be added in non-contiguous chunks. Additional chunks are
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* added by calling this function.
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*
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************************************************************************/
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#if CONFIG_MM_REGIONS > 1
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void up_addregion(void)
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{
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#if CONFIG_MM_REGIONS > 1
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/* Add the next SRAM region (which should exist) */
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kmm_addregion((FAR void*)MM_REGION2_BASE, MM_REGION2_SIZE);
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#ifdef MM_REGION3_BASE
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/* Add the third SRAM region (which will not exist in configuration B) */
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#if CONFIG_MM_REGIONS > 2
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/* Add the third SRAM region (which may not exist) */
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kmm_addregion((FAR void*)MM_REGION3_BASE, MM_REGION3_SIZE);
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#if CONFIG_MM_REGIONS > 3 && defined(MM_DMAHEAP_BASE)
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/* Add the DMA region (which may not be available) */
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kmm_addregion((FAR void*)MM_DMAHEAP_BASE, MM_DMAHEAP_SIZE);
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#endif /* CONFIG_MM_REGIONS > 3 && defined(MM_DMAHEAP_BASE) */
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#endif /* CONFIG_MM_REGIONS > 2 */
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#else /* MM_REGION3_BASE */
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#if CONFIG_MM_REGIONS > 2 && defined(MM_DMAHEAP_BASE)
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/* Add the DMA region (which may not be available) */
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kmm_addregion((FAR void*)MM_DMAHEAP_BASE, MM_DMAHEAP_SIZE);
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#endif /* CONFIG_MM_REGIONS > 3 && defined(MM_DMAHEAP_BASE) */
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#endif /* MM_REGION3_BASE */
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#endif /* CONFIG_MM_REGIONS > 1 */
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}
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#endif
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