077ef70b0c
* arch: cxd56xx: Add size limitation for I2C SCU xfer This is a fw restriction, unroll loop because it can be transfer up to 16 bytes. * arch: cxd56xx: Fix lack of leave_critical_section add the missing leave_critical_section * arch: cxd56xx: Remove unnecessary file this header is duplicate and we can remove it * arch: cxd56xx: Cosmetic change remove space after function * arch: cxd56xx: update topreg registers the topreg registers are updated to match the cxd5602 HW * arch: cxd56xx: Add voltage setting for low battery notification Add voltage setting for low battery notification * arch: cxd56xx: Improve perfomance of SD card Improve a problem that the clock of SD Host Controller is lower than the expected value in SDR25 transfer mode. * arch: cxd56xx: Cosmetic changes cleanup to comply with coding standard * boards: cxd56xx: Cosmetic changes updates to comply with coding standard * boards: cxd56xx: Fix SD card cannot mount issue SD card cannot mount when connecting and disconnecting three times or more due to wrong state of parameter 'initialized'. This change enables to skip swtching initialized state when mount failed.
456 lines
11 KiB
C
456 lines
11 KiB
C
/***************************************************************************
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* boards/arm/cxd56xx/drivers/audio/cxd56_audio_ac_reg.h
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*
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* Copyright 2018 Sony Semiconductor Solutions Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name of Sony Semiconductor Solutions Corporation nor
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* the names of its contributors may be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_CXD56XX_DRIVERS_AUDIO_CXD56_AUDIO_AC_REG_H
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#define __BOARDS_ARM_CXD56XX_DRIVERS_AUDIO_CXD56_AUDIO_AC_REG_H
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/***************************************************************************
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* Included Files
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****************************************************************************/
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#include <arch/chip/audio.h>
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/***************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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enum audio_codec_register_id_e
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{
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RI_REVID = 0,
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RI_DEVICEID,
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RI_PDN_AMICEXT,
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RI_PDN_AMIC1,
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RI_PDN_AMIC2,
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RI_PDN_DAC,
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RI_PDN_LINEIN,
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RI_PDN_MIC,
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RI_PDN_DMIC,
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RI_PDN_DSPB,
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RI_PDN_ANC,
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RI_PDN_DNC1,
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RI_PDN_DNC2,
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RI_PDN_SMSTR,
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RI_PDN_DSPS2,
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RI_PDN_DSPS1,
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RI_PDN_DSPC,
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RI_FS_FS,
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RI_DECIM0_EN,
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RI_DECIM1_EN,
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RI_SDES_EN,
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RI_MCK_AHBMSTR_EN,
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RI_AU_DAT_SEL2,
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RI_AU_DAT_SEL1,
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RI_COD_INSEL3,
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RI_COD_INSEL2,
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RI_COD_INSEL1,
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RI_DSR_RATE,
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RI_DIGSFT,
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RI_SRC1,
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RI_SRC1IN_SEL,
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RI_SRC2,
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RI_SRC2IN_SEL,
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RI_DIF2,
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RI_DIF1,
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RI_SD2MASTER,
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RI_SD1MASTER,
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RI_SDCK_OUTENX,
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RI_HI_RES_MODE,
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RI_HPF2_MODE,
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RI_CIC2IN_SWAP,
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RI_INV_DMIC2L,
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RI_INV_DMIC2R,
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RI_CIC2_GAIN_MODE,
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RI_CIC2IN_SEL,
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RI_ADC2_BOOST,
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RI_INV_AMIC2L,
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RI_INV_AMIC2R,
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RI_HPF1_MODE,
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RI_CIC1IN_SWAP,
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RI_INV_DMIC1L,
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RI_INV_DMIC1R,
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RI_CIC1_GAIN_MODE,
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RI_CIC1IN_SEL,
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RI_ADC1_BOOST,
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RI_ADC_FS,
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RI_INV_AMIC1L,
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RI_INV_AMIC1R,
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RI_HPF4_MODE,
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RI_CIC4IN_SWAP,
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RI_INV_DMIC4L,
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RI_INV_DMIC4R,
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RI_CIC4IN_SEL,
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RI_ADC4_BOOST,
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RI_INV_AMIC4L,
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RI_INV_AMIC4R,
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RI_HPF3_MODE,
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RI_CIC3IN_SWAP,
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RI_INV_DMIC3L,
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RI_INV_DMIC3R,
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RI_CIC3IN_SEL,
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RI_ADC_3_BOOST,
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RI_INV_AMIC3L,
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RI_INV_AMIC3R,
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RI_CIC1_RGAIN,
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RI_CIC1_LGAIN,
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RI_CIC2_RGAIN,
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RI_CIC2_LGAIN,
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RI_CIC3_RGAIN,
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RI_CIC3_LGAIN,
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RI_CIC4_RGAIN,
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RI_CIC4_LGAIN,
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RI_SPC_LIMIT,
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RI_SPC_EN,
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RI_ALC_KNEE,
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RI_ALCTARGET,
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RI_ALC_REC,
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RI_ALC_EN,
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RI_INV_ASP2R,
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RI_INV_ASP2L,
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RI_INV_ASP1R,
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RI_INV_ASP1L,
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RI_ARC,
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RI_ARC_VOL,
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RI_CS_VOL,
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RI_CS_SIGN,
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RI_SDOUT_VOL,
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RI_SDIN2_VOL,
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RI_SDIN1_VOL,
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RI_SDIN1_EN,
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RI_SDIN2_EN,
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RI_SDOUT1_EN,
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RI_SDOUT2_EN,
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RI_MUTE_B,
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RI_BLF_EN,
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RI_TRANS_MODE,
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RI_DAC_VOL,
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RI_LINEIN_VOL,
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RI_BEEP_VOL,
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RI_BEEP_FREQ,
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RI_BEEP_ON,
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RI_M_SPCLKERR1,
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RI_M_SPCLKERR2,
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RI_ADC1L_VOL,
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RI_ADC1R_VOL,
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RI_ADC2L_VOL,
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RI_ADC2R_VOL,
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RI_SMS_INTIM,
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RI_DNC2_AVF,
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RI_DNC2_MONION1,
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RI_DNC2_MONIEN1,
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RI_DNC2_MONION0,
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RI_DNC2_MONIEN0,
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RI_DNC1_AVF,
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RI_DNC1_MONION1,
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RI_DNC1_MONIEN1,
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RI_DNC1_MONION0,
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RI_DNC1_MONIEN0,
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RI_DNC2_CFMD,
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RI_DNC2_ESS,
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RI_DNC2_ZWR,
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RI_DNC2_MUTE,
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RI_DNC2_START,
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RI_DNC1_CFMD,
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RI_DNC1_ESS,
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RI_DNC1_ZWR,
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RI_DNC1_MUTE,
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RI_DNC1_START,
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RI_DNC_STB,
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RI_DCMFS_34,
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RI_DNC_512,
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RI_DCMFS,
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RI_DNC1_CANVOL1,
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RI_DNC1_CANVOL0,
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RI_DNC2_CANVOL1,
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RI_DNC2_CANVOL0,
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RI_DNC1_MONVOL1,
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RI_DNC1_MONVOL0,
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RI_DNC2_MONVOL1,
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RI_DNC2_MONVOL0,
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RI_DNC1_ALGAIN1,
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RI_DNC1_ALGAIN0,
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RI_DNC2_ALGAIN1,
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RI_DNC2_ALGAIN0,
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RI_DNC_PHD,
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RI_DNC1_LIMIYT,
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RI_DNC1_LMTON0,
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RI_DNC1_LIMITR,
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RI_DNC1_LIMITA,
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RI_DNC1_INSTMD,
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RI_DNC2_LIMIYT,
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RI_DNC2_LMTON0,
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RI_DNC2_LIMITR,
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RI_DNC2_LIMITA,
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RI_DNC2_INSTMD,
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RI_ANC_FALVL,
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RI_ANC_TST,
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RI_ANC_FATST,
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RI_ENVREG_RESET,
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RI_ANC_CHSEL,
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RI_ANC_TR,
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RI_ANC_TA,
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RI_ANC_SOUT,
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RI_ANC_FASPN,
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RI_ANC_ZWR,
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RI_ANC_MUTE,
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RI_ANC_START,
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RI_ANC_FASTART,
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RI_ANC_FAWTB,
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RI_ANC_FAWTA,
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RI_ANC_ENV1,
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RI_ANC_ENV0,
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RI_ANC_CURST,
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RI_ANC_FAST,
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RI_ANC_ENV2,
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RI_NS_AMMD,
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RI_BPGAIN,
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RI_BPSEL,
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RI_NSDI,
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RI_NSII,
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RI_BPON,
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RI_NSMS,
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RI_CHSEL,
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RI_NSADJON,
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RI_NSX2,
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RI_NSPMUTE,
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RI_NSDD,
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RI_OUT2DLY,
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RI_NSAD,
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RI_PWMMD,
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RI_NSAS,
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RI_NSADJ,
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RI_VCONT,
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RI_TEST_OUT,
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RI_TEST_OUT_SEL0,
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RI_TEST_OUT_SEL1,
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RI_TEST_IN,
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RI_S_RESET,
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RI_HALT_INHIBIT,
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RI_FSRDBGMD,
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RI_BEEP_TEST,
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RI_ARWPHSET,
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RI_DSPRAM4_CLR,
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RI_DSPRAM3_CLR,
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RI_DSPRAM2_CLR,
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RI_DSPRAM1_CLR,
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RI_ALC_DELAY,
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RI_ALC_ALG,
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RI_ARC_TIMER,
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RI_ARC_DLY,
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RI_SPC_AWEIGHT,
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RI_SPC_ALC_ATTACK,
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RI_SPC_ALC_RELEASE,
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RI_ALC_LPF,
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RI_SPC_ENERGY,
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RI_W_RSRV,
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RI_R_RSRV,
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RI_SER_MODE,
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RI_PDM_OUT_EN,
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RI_FS_CLK_EN,
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RI_SEL_OUT4_R,
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RI_SEL_OUT4_L,
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RI_SEL_OUT3_R,
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RI_SEL_OUT3_L,
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RI_SEL_OUT2_R,
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RI_SEL_OUT2_L,
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RI_SEL_OUT1_R,
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RI_SEL_OUT1_L,
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RI_OUTEN_MIC1L_B,
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RI_OUTEN_MIC1R_B,
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RI_OUTEN_MIC2L_B,
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RI_OUTEN_MIC2R_B,
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RI_OUTEN_MIC1L_A,
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RI_OUTEN_MIC1R_A,
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RI_OUTEN_MIC2L_A,
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RI_OUTEN_MIC2R_A,
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RI_SEL_OUTF,
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RI_SEL_INF,
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RI_SEL_DECIM,
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RI_DEQ_COEF_1B0,
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RI_DEQ_EN,
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RI_DEQ_COEF_1B1,
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RI_DEQ_COEF_1B2,
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RI_DEQ_COEF_1A1,
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RI_DEQ_COEF_1A2,
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RI_DEQ_COEF_2B0,
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RI_DEQ_COEF_2B1,
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RI_DEQ_COEF_2B2,
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RI_DEQ_COEF_2A1,
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RI_DEQ_COEF_2A2,
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RI_DEQ_COEF_3B0,
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RI_DEQ_COEF_3B1,
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RI_DEQ_COEF_3B2,
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RI_DEQ_COEF_3A1,
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RI_DEQ_COEF_3A2,
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RI_DEQ_COEF_4B0,
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RI_DEQ_COEF_4B1,
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RI_DEQ_COEF_4B2,
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RI_DEQ_COEF_4A1,
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RI_DEQ_COEF_4A2,
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RI_DEQ_COEF_5B0,
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RI_DEQ_COEF_5B1,
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RI_DEQ_COEF_5B2,
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RI_DEQ_COEF_5A1,
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RI_DEQ_COEF_5A2,
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RI_DEQ_COEF_6B0,
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RI_DEQ_COEF_6B1,
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RI_DEQ_COEF_6B2,
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RI_DEQ_COEF_6A1,
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RI_DEQ_COEF_6A2,
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RI_LR_SWAP1,
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RI_LR_SWAP2,
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RI_DUMMY_0,
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RI_DUMMY_1,
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RI_DUMMY_2,
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RI_DUMMY_3,
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RI_DUMMY_4,
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RI_DUMMY_5,
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RI_DUMMY_6,
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RI_DUMMY_7,
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RI_DUMMY_8,
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RI_DUMMY_9,
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RI_DUMMY_10,
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RI_DUMMY_11,
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RI_DUMMY_12,
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RI_DUMMY_13,
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RI_DUMMY_14,
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RI_DUMMY_15,
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RI_DUMMY_16,
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RI_DUMMY_17,
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RI_DUMMY_18,
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RI_DUMMY_19,
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RI_DUMMY_20,
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RI_DUMMY_21,
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RI_DUMMY_22,
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RI_DUMMY_23,
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RI_DUMMY_24,
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RI_DUMMY_25,
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RI_DUMMY_26,
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RI_DUMMY_27,
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RI_DUMMY_28,
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RI_DUMMY_29,
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RI_DUMMY_30,
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RI_DUMMY_31,
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RI_RAM_RW_EN,
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RI_REG_MAX_ENTRY
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};
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typedef enum audio_codec_register_id_e AC_REG_ID;
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/***************************************************************************
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* Public Types
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****************************************************************************/
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struct cxd56_audio_ac_reg_seloutch_s
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{
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uint8_t ch[CXD56_AUDIO_MIC_CH_MAX];
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};
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typedef struct cxd56_audio_ac_reg_seloutch_s cxd56_audio_ac_reg_seloutch_t;
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/***************************************************************************
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* Public Data
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****************************************************************************/
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/***************************************************************************
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* Inline Functions
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****************************************************************************/
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/***************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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CXD56_AUDIO_ECODE cxd56_audio_ac_reg_checkid(void);
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void cxd56_audio_ac_reg_resetdsp(void);
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void cxd56_audio_ac_reg_initdsp(void);
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void cxd56_audio_ac_reg_poweron_sdes(void);
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CXD56_AUDIO_ECODE cxd56_audio_ac_reg_set_micmode(uint8_t mic_mode);
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void cxd56_audio_ac_reg_poweron_codec(void);
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void cxd56_audio_ac_reg_poweroff_codec(void);
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void cxd56_audio_ac_reg_enable_serialif(void);
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void cxd56_audio_ac_reg_init_selector(void);
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CXD56_AUDIO_ECODE cxd56_audio_ac_reg_set_alcspc(void);
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void cxd56_audio_ac_reg_poweron_dnc(void);
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void cxd56_audio_ac_reg_poweroff_dnc(void);
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void cxd56_audio_ac_reg_disable_dnc(cxd56_audio_dnc_id_t id);
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void cxd56_audio_ac_reg_enable_dnc(cxd56_audio_dnc_id_t id);
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void cxd56_audio_ac_reg_mute_dnc(cxd56_audio_dnc_id_t id);
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void cxd56_audio_ac_reg_unmute_dnc(cxd56_audio_dnc_id_t id);
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void cxd56_audio_ac_reg_set_dncram(cxd56_audio_dnc_id_t id,
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FAR cxd56_audio_dnc_bin_t *bin);
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void cxd56_audio_ac_reg_enable_deq(void);
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void cxd56_audio_ac_reg_disable_deq(void);
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void cxd56_audio_ac_reg_set_deq_param(FAR cxd56_audio_deq_coef_t *deq);
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CXD56_AUDIO_ECODE cxd56_audio_ac_reg_poweron_cic(uint8_t mic_in,
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uint8_t mic_mode,
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uint8_t cic_num,
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FAR cxd56_audio_mic_gain_t *gain);
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void cxd56_audio_ac_reg_poweroff_cic(void);
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CXD56_AUDIO_ECODE cxd56_audio_ac_reg_poweron_decim(uint8_t mic_mode,
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uint8_t clk_mode);
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void cxd56_audio_ac_reg_poweroff_decim(void);
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void cxd56_audio_ac_reg_poweron_smaster(uint8_t clk_mode);
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void cxd56_audio_ac_reg_poweroff_smaster(void);
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void cxd56_audio_ac_reg_enable_smaster(void);
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void cxd56_audio_ac_reg_disable_smaster(void);
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void cxd56_audio_ac_reg_enable_beep(void);
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void cxd56_audio_ac_reg_disable_beep(void);
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void cxd56_audio_ac_reg_set_beep_freq(uint32_t freq);
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void cxd56_audio_ac_reg_set_beep_vol(uint32_t vol);
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void cxd56_audio_ac_reg_set_cicgain(uint8_t cic_num,
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FAR cxd56_audio_mic_gain_t *gain);
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void cxd56_audio_ac_reg_enable_digsft(void);
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void cxd56_audio_ac_reg_disable_digsft(void);
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void cxd56_audio_ac_reg_set_dsrrate(uint32_t rate);
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void cxd56_audio_ac_reg_set_seloutch(FAR cxd56_audio_ac_reg_seloutch_t *seloutch);
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void cxd56_audio_ac_reg_enable_dma(void);
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void cxd56_audio_ac_reg_poweron_i2s(uint8_t clk_mode);
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void cxd56_audio_ac_reg_enable_i2s_src1(void);
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void cxd56_audio_ac_reg_enable_i2s_src2(void);
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void cxd56_audio_ac_reg_enable_i2s_bcklrckout(void);
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void cxd56_audio_ac_reg_disable_i2s_bcklrckout(void);
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CXD56_AUDIO_ECODE cxd56_audio_ac_reg_set_selector(cxd56_audio_signal_t sig,
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cxd56_audio_sel_t sel);
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CXD56_AUDIO_ECODE cxd56_audio_ac_reg_enable_cstereo(bool sign_inv,
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int16_t vol);
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void cxd56_audio_ac_reg_disable_cstereo(void);
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void cxd56_audio_ac_reg_set_vol_sdin1(uint32_t vol);
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void cxd56_audio_ac_reg_set_vol_sdin2(uint32_t vol);
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void cxd56_audio_ac_reg_set_vol_dac(uint32_t vol);
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#endif /* __BOARDS_ARM_CXD56XX_DRIVERS_AUDIO_CXD56_AUDIO_AC_REG_H */
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