Alexander Lunev 0aecfe8691 stm32h7 sdmmc: set SDMMC_CK pin to high speed (50 MHz) mode. ...

When it was in slow speed mode (by default), the output SDMMC_CK clock rise and
fall times were about 13 ns each, that were very slow and
prevented some SDIO devices from working.

2021-12-16 01:28:05 -06:00

..

include

arch: Add _wchar_t typedef like other basic types

2021-12-09 16:57:23 +09:00

src

stm32h7 sdmmc: set SDMMC_CK pin to high speed (50 MHz) mode.

2021-12-16 01:28:05 -06:00

Kconfig

arch: arm: select LIBC_ARCH_ATOMIC when config ARCH_CHIP_RP2040

2021-12-11 11:32:17 -06:00