331 lines
13 KiB
C
331 lines
13 KiB
C
/************************************************************************************
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* arch/arm/include/samd/chip.h
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_SAMD_CHIP_H
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#define __ARCH_ARM_INCLUDE_SAMD_CHIP_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Get customizations for each supported chip */
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/* SAMD20 Family ********************************************************************/
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/* FEATURE SAM D20J SAM D20G SAM D20E
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* ------------------- ------------------ ------------------ --------
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* No. of pins 64 48 32
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* Flash 256/128/64/32/16KB 256/128/64/32/16KB 256/128/64/32/16KB
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* SRAM 32/16/8/4/2KB 32/16/8/4/2KB 32/16/8/4/2KB
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* Max. Freq. 48MHz 48MHz 48MHz
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* Event channels 8 8 8
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* Timer/counters 8 6 6
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* TC output channels 2 2 2
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* SERCOM 6 6 4
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* ADC channels 20 14 10
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* Comparators 2 2 2
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* DAC channels 1 1 1
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* RTC Yes Yes Yes
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* RTC alarms 1 1 1
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* RTC compare 1 32-bit/2 16-bit 1 32-bit/2 16-bit 1 32-bit/2 16-bit
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* External interrupts 16 16 16
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* PTC X an Y 16x16 12x10 10x6
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* Packages QFN/TQFP QFN/TQFP QFN/TQFP
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* Oscillators XOSC32, XOSC, OSC32K, OSCULP32K, OSC8M, and DFLL48M
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* SW Debug interface Yes Yes Yes
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* Watchdog timer Yes Yes Yes
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*/
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#if defined(CONFIG_ARCH_CHIP_SAMD20E14)
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# define SAMD20 1 /* SAMD20 family */
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# define SAMD20E 1 /* SAMD20E */
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# undef SAMD20G
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# undef SAMD20J
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/* Internal memory */
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# define SAMD_FLASH_SIZE (16*1024) /* 16KB */
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# define SAMD_SRAM0_SIZE (2*1024) /* 2KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20E15)
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# define SAMD20 1 /* SAMD20 family */
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# define SAMD20E 1 /* SAMD20E */
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# undef SAMD20G
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# undef SAMD20J
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/* Internal memory */
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# define SAMD_FLASH_SIZE (32*1024) /* 32KB */
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# define SAMD_SRAM0_SIZE (4*1024) /* 4KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20E16)
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# define SAMD20 1 /* SAMD20 family */
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# define SAMD20E 1 /* SAMD20E */
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# undef SAMD20G
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# undef SAMD20J
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/* Internal memory */
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# define SAMD_FLASH_SIZE (64*1024) /* 64KB */
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# define SAMD_SRAM0_SIZE (8*1024) /* 8KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20E17)
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# define SAMD20 1 /* SAMD20 family */
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# define SAMD20E 1 /* SAMD20E */
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# undef SAMD20G
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# undef SAMD20J
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/* Internal memory */
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# define SAMD_FLASH_SIZE (128*1024) /* 128KB */
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# define SAMD_SRAM0_SIZE (16*1024) /* 16KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20E18)
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# define SAMD20 1 /* SAMD20 family */
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# define SAMD20E 1 /* SAMD20E */
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# undef SAMD20G
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# undef SAMD20J
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/* Internal memory */
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# define SAMD_FLASH_SIZE (256*1024) /* 256KB */
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# define SAMD_SRAM0_SIZE (32*1024) /* 32KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20G14)
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# define SAMD20 1 /* SAMD20 family */
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# undef SAMD20E
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# define SAMD20G 1 /* SAMD20G */
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# undef SAMD20J
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/* Internal memory */
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# define SAMD_FLASH_SIZE (16*1024) /* 16KB */
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# define SAMD_SRAM0_SIZE (2*1024) /* 2KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20G15)
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# define SAMD20 1 /* SAMD20 family */
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# undef SAMD20E
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# define SAMD20G 1 /* SAMD20G */
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# undef SAMD20J
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/* Internal memory */
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# define SAMD_FLASH_SIZE (32*1024) /* 32KB */
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# define SAMD_SRAM0_SIZE (4*1024) /* 4KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20G16)
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# define SAMD20 1 /* SAMD20 family */
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# undef SAMD20E
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# define SAMD20G 1 /* SAMD20G */
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# undef SAMD20J
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/* Internal memory */
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# define SAMD_FLASH_SIZE (64*1024) /* 64KB */
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# define SAMD_SRAM0_SIZE (8*1024) /* 8KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20G17)
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# define SAMD20 1 /* SAMD20 family */
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# undef SAMD20E
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# define SAMD20G 1 /* SAMD20G */
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# undef SAMD20J
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/* Internal memory */
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# define SAMD_FLASH_SIZE (128*1024) /* 128KB */
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# define SAMD_SRAM0_SIZE (16*1024) /* 16KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20G18)
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# define SAMD20 1 /* SAMD20 family */
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# undef SAMD20E
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# define SAMD20G 1 /* SAMD20G */
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# undef SAMD20J
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/* Internal memory */
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# define SAMD_FLASH_SIZE (256*1024) /* 256KB */
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# define SAMD_SRAM0_SIZE (32*1024) /* 32KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20J14)
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# define SAMD20 1 /* SAMD20 family */
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# undef SAMD20E
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# undef SAMD20G
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# define SAMD20J 1 /* SAMD20J */
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/* Internal memory */
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# define SAMD_FLASH_SIZE (16*1024) /* 16KB */
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# define SAMD_SRAM0_SIZE (2*1024) /* 2KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20J15)
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# define SAMD20 1 /* SAMD20 family */
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# undef SAMD20E
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# undef SAMD20G
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# define SAMD20J 1 /* SAMD20J */
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/* Internal memory */
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# define SAMD_FLASH_SIZE (32*1024) /* 32KB */
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# define SAMD_SRAM0_SIZE (4*1024) /* 4KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20J16)
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# define SAMD20 1 /* SAMD20 family */
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# undef SAMD20E
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# undef SAMD20G
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# define SAMD20J 1 /* SAMD20J */
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/* Internal memory */
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# define SAMD_FLASH_SIZE (64*1024) /* 64KB */
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# define SAMD_SRAM0_SIZE (8*1024) /* 8KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20J17)
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# define SAMD20 1 /* SAMD20 family */
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# undef SAMD20E
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# undef SAMD20G
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# define SAMD20J 1 /* SAMD20J */
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/* Internal memory */
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# define SAMD_FLASH_SIZE (128*1024) /* 128KB */
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# define SAMD_SRAM0_SIZE (16*1024) /* 16KB */
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#elif defined(CONFIG_ARCH_CHIP_SAMD20J18)
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# define SAMD20 1 /* SAMD20 family */
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# undef SAMD20E
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# undef SAMD20G
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# define SAMD20J 1 /* SAMD20J */
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/* Internal memory */
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# define SAMD_FLASH_SIZE (256*1024) /* 256KB */
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# define SAMD_SRAM0_SIZE (32*1024) /* 32KB */
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#endif
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/* SAMD20 Peripherals */
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#if defined(SAMD20E)
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# define SAMD_NEVENTS 8 /* 8 event channels */
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# define SAMD_NTC 6 /* 6 Timer/counters */
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# define SAMD_NTCOUT 2 /* 2 TC output channels */
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# define SAMD_NSERCOM 4 /* 4 SERCOM */
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# define SAMD_NADC 10 /* 10 ADC channels */
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# define SAMD_NCMP 2 /* 2 Comparators */
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# define SAMD_NDAC 1 /* 1 DAC channel */
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# define SAMD_RTC 1 /* Have RTC */
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# define SAMD_NALARMS 1 /* 1 RTC alarm */
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# define SAMD_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
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# define SAMD_NEXTINT 16 /* 16 External interrupts */
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# define SAMD_NPTCX 10 /* PTC X */
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# define SAMD_NPTCY 6 /* PTC Y */
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# define SAMD_WDT /* Have watchdog timer */
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#elif defined(SAMD20G)
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# define SAMD_NEVENTS 8 /* 8 event channels */
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# define SAMD_NTC 6 /* 6 Timer/counters */
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# define SAMD_NTCOUT 2 /* 2 TC output channels */
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# define SAMD_NSERCOM 6 /* 6 SERCOM */
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# define SAMD_NADC 15 /* 14 ADC channels */
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# define SAMD_NCMP 2 /* 2 Comparators */
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# define SAMD_NDAC 1 /* 1 DAC channel */
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# define SAMD_RTC 1 /* Have RTC */
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# define SAMD_NALARMS 1 /* 1 RTC alarm */
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# define SAMD_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
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# define SAMD_NEXTINT 16 /* 16 External interrupts */
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# define SAMD_NPTCX 12 /* PTC X */
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# define SAMD_NPTCY 10 /* PTC Y */
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# define SAMD_WDT /* Have watchdog timer */
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#elif defined(SAMD20J)
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# define SAMD_NEVENTS 8 /* 8 event channels */
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# define SAMD_NTC 8 /* 8 Timer/counters */
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# define SAMD_NTCOUT 2 /* 2 TC output channels */
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# define SAMD_NSERCOM 6 /* 6 SERCOM */
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# define SAMD_NADC 20 /* 20 ADC channels */
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# define SAMD_NCMP 2 /* 2 Comparators */
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# define SAMD_NDAC 1 /* 1 DAC channel */
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# define SAMD_RTC 1 /* Have RTC */
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# define SAMD_NALARMS 1 /* 1 RTC alarm */
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# define SAMD_NRTCMP 1 /* RTC compare: 1 32-bit/2 16-bit */
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# define SAMD_NEXTINT 16 /* 16 External interrupts */
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# define SAMD_NPTCX 16 /* PTC X */
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# define SAMD_NPTCY 16 /* PTC Y */
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# define SAMD_WDT /* Have watchdog timer */
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#endif
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/* NVIC priority levels *************************************************************/
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/* Each priority field holds a priority value, 0-3. The lower the value, the greater
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* the priority of the corresponding interrupt. The processor implements only
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* bits[7:6] of each field, bits[5:0] read as zero and ignore writes.
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*/
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#define NVIC_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:3] set is minimum priority */
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#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
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#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
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#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Five bits of interrupt priority used */
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_INCLUDE_SAMD_CHIP_H */
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