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0d3abe6ebb
nuttx/boards/risc-v/k210/maix-bit
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Huang Qi 0d3abe6ebb boards/k210: Use 8 byte align in linker script 
I noticed sometimes once config changed, it will not launch to shell,
maybe due to
K210 is a 64-bit platform and without misaligned memory access support.

This patch may fix this problem, it will not introduce new issues at least.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-04-28 18:22:09 +08:00
..
configs boars/spawn_proxy: remove all CONFIG_POSIX_SPAWN_PROXY_STACKSIZE 2023-04-27 17:35:58 +08:00
include
kernel Remove the unnecessary cast for main_t, NULL and argv 2022-10-18 08:51:45 +02:00
scripts boards/k210: Use 8 byte align in linker script 2023-04-28 18:22:09 +08:00
src
Kconfig
README-qemu.txt NuttX graduated the Incubator; update repository links 2022-11-26 11:58:15 -08:00
README.txt NuttX graduated the Incubator; update repository links 2022-11-26 11:58:15 -08:00

README.txt 

1. Download and install toolchain and openocd-k210

  $ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz
  $ export PATH=$PATH:/$TOOL_CHAIN_PATH/bin

2. Build openocd-k210

  $ git clone https://github.com/kendryte/openocd-kendryte
  $ cd openocd-kendryte
  $ ./bootstrap & ./configure & make

3. Configure and build NuttX

  $ mkdir ./nuttx; cd ./nuttx
  $ git clone https://github.com/apache/nuttx.git nuttx
  $ git clone https://github.com/apache/nuttx-apps.git apps
  $ cd nuttx
  $ make distclean
  $ ./tools/configure.sh maix-bit:nsh
  $ make V=1

4. Download and run the nuttx from SRAM (not SPI-Flash)

  $ picocom -b 115200 /dev/ttyUSB0
  $ sudo ./src/openocd -s ./tcl -f ./tcl/kendryte.cfg -m 0
  $ riscv64-unknown-elf-gdb ./nuttx
  (gdb) target extended-remote :3333
  (gdb) load nuttx
  (gdb) c

5. Write nuttx.bin to SPI-Flash

  $ pip3 install kflash
  $ kflash -p /dev/ttyUSB0 -b 1500000 ./nuttx/nuttx.bin

  NOTE: The kflash_gui is not recommended because it's unstable

6. TODO

  Support peripherals such as GPIO/SPI/I2C/...
  Support FPU
  Support RISC-V U-mode including memory protection