54e630e14d
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
528 lines
13 KiB
C
528 lines
13 KiB
C
/****************************************************************************
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* arch/arm/src/nrf52/nrf52_nvmc.c
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*
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* Copyright (C) 2018 Zglue Inc. All rights reserved.
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* Author: Levin Li <zhiqiang@zglue.com>
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* Author: Alan Carvalho de Assis <acassis@gmail.com>
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*
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* Ported from the Nordic SDK, this is the original license:
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*
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* Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
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* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include "arm_internal.h"
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#include "barriers.h"
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#include "hardware/nrf52_ficr.h"
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#include "hardware/nrf52_nvmc.h"
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#include "nrf52_nvmc.h"
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: wait_for_flash_ready
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*
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* Description:
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* Busy-wait until the flash operation is done.
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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static inline void wait_for_flash_ready(void)
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{
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while (!(getreg32(NRF52_NVMC_READY) & NVMC_READY_READY))
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{
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}
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}
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/****************************************************************************
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* Name: nrf_mem_barrier
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*
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* Description:
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* Force memory sync before continuing.
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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static inline void nrf_mem_barrier(void)
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{
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ARM_ISB();
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ARM_DSB();
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: nrf_nvmc_enable_icache
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*
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* Description:
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* Enable I-Cache for Flash
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*
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* Input Parameter:
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* flag - Flag to enable or disable.
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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void nrf_nvmc_enable_icache(bool flag)
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{
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uint32_t value;
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/* Read the current icache configuration */
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value = getreg32(NRF52_NVMC_ICACHECNF);
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if (flag)
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{
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value |= NVMC_ICACHECNF_CACHEEN;
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}
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else
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{
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value &= ~NVMC_ICACHECNF_CACHEEN;
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}
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/* Setup the new icache configuration */
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putreg32(value, NRF52_NVMC_ICACHECNF);
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}
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/****************************************************************************
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* Name: nrf_nvmc_enable_profile
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*
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* Description:
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* Enable profiling I-Cache for flash
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*
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* Input Parameter:
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* flag - Flag to enable or disable.
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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void nrf_nvmc_enable_profile(bool flag)
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{
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uint32_t value;
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/* Read the current icache configuration */
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value = getreg32(NRF52_NVMC_ICACHECNF);
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if (flag)
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{
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value |= NVMC_ICACHECNF_CACHEPROFEN;
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}
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else
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{
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value &= ~NVMC_ICACHECNF_CACHEPROFEN;
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}
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/* Setup the new icache configuration */
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putreg32(value, NRF52_NVMC_ICACHECNF);
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}
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/****************************************************************************
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* Name: nrf_nvmc_get_profiling_ihit
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*
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* Description:
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* Get I-Hit for profiling
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* Number of cache hits.
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*
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****************************************************************************/
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uint32_t nrf_nvmc_get_profiling_ihit(void)
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{
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return getreg32(NRF52_NVMC_IHIT);
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}
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/****************************************************************************
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* Name: nrf_nvmc_get_profiling_imiss
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*
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* Description:
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* Get I-Miss for profiling
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* Number of cache misses.
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*
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****************************************************************************/
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uint32_t nrf_nvmc_get_profiling_imiss(void)
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{
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return getreg32(NRF52_NVMC_IMISS);
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}
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/****************************************************************************
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* Name: nrf_nvmc_get_flash_size
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*
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* Description:
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* Get internal FLASH size
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* Flash size.
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*
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****************************************************************************/
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uint32_t nrf_nvmc_get_flash_size(void)
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{
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return getreg32(NRF52_FICR_INFO_FLASH) * 1024;
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}
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/****************************************************************************
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* Name: nrf_nvmc_get_ram_size
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*
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* Description:
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* Get internal RAM size.
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* RAM size.
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*
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****************************************************************************/
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uint32_t nrf_nvmc_get_ram_size(void)
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{
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return getreg32(NRF52_FICR_INFO_RAM) * 1024;
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}
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/****************************************************************************
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* Name: nrf_nvmc_read_dev_id0
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*
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* Description:
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* Get device identifier 0
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* Value of ID0
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*
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****************************************************************************/
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uint32_t nrf_nvmc_read_dev_id0(void)
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{
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return getreg32(NRF52_FICR_DEVICEID0);
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}
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/****************************************************************************
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* Name: nrf_nvmc_read_dev_id1
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*
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* Description:
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* Get device identifier 1
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* Value of ID1
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*
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****************************************************************************/
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uint32_t nrf_nvmc_read_dev_id1(void)
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{
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return getreg32(NRF52_FICR_DEVICEID1);
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}
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/****************************************************************************
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* Name: system_image_start_address
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*
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* Description:
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* Get system image code begin address.
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* Address where code starts.
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*
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****************************************************************************/
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uint32_t system_image_start_address(void)
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{
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extern uint32_t _stext;
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return (uint32_t)&_stext;
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}
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/****************************************************************************
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* Name: system_image_ro_section_end
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*
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* Description:
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* Get system image end address of read only section.
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* The end address of the RO section.
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*
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****************************************************************************/
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uint32_t system_image_ro_section_end(void)
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{
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return (uint32_t)&_eronly;
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}
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/****************************************************************************
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* Name: system_image_data_section_size
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*
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* Description:
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* Get system image data section size
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*
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* Input Parameter:
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* None
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*
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* Returned Values:
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* The size of the data section.
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*
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****************************************************************************/
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uint32_t system_image_data_section_size(void)
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{
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extern uint32_t _edata;
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extern uint32_t _sdata;
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uint32_t data_size;
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uint32_t start;
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uint32_t end;
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start = (uint32_t)&_sdata;
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end = (uint32_t)&_edata;
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data_size = end - start;
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return data_size;
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}
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/****************************************************************************
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* Name: nrf_nvmc_page_erase
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*
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* Description:
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* Erase a page in flash. This is required before writing to any
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* address in the page.
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*
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* Input Parameter:
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* address - Start address of the page.
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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void nrf_nvmc_page_erase(uint32_t address)
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{
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/* Enable erase */
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putreg32(NVMC_CONFIG_EEN, NRF52_NVMC_CONFIG);
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nrf_mem_barrier();
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/* Erase the page */
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putreg32(address, NRF52_NVMC_ERASEPAGE);
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wait_for_flash_ready();
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/* Return to read-only mode */
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putreg32(NVMC_CONFIG_REN, NRF52_NVMC_CONFIG);
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nrf_mem_barrier();
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}
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/****************************************************************************
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* Name: nrf_nvmc_write_byte
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*
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* Description:
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* The function reads the word containing the byte, and then
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* rewrites the entire word.
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*
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* Input Parameter:
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* address - Address to write to.
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* value - Value to write.
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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void nrf_nvmc_write_byte(uint32_t address, uint8_t value)
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{
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uint32_t byte_shift = address & (uint32_t)0x03;
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uint32_t address32 = address & ~byte_shift; /* Address to the word this byte is in. */
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uint32_t value32 = (*(uint32_t *)address32 &
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~((uint32_t)0xff << (byte_shift << (uint32_t)3)));
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value32 = value32 + ((uint32_t)value << (byte_shift << 3));
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/* Enable write */
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putreg32(NVMC_CONFIG_WEN, NRF52_NVMC_CONFIG);
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nrf_mem_barrier();
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/* Write the byte, needs to be a single 32-bit write operation */
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*(uint32_t *)address32 = value32;
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wait_for_flash_ready();
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/* Return to read-only mode */
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putreg32(NVMC_CONFIG_REN, NRF52_NVMC_CONFIG);
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nrf_mem_barrier();
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}
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/****************************************************************************
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* Name: nrf_nvmc_write_word
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*
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* Description:
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* Write a 32-bit word to flash.
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*
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* Input Parameter:
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* address - Address to write to.
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* value - Value to write.
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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void nrf_nvmc_write_word(uint32_t address, uint32_t value)
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{
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/* Enable write */
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putreg32(NVMC_CONFIG_WEN, NRF52_NVMC_CONFIG);
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nrf_mem_barrier();
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/* Write the word */
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*(uint32_t *)address = value;
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wait_for_flash_ready();
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/* Return to read-only mode */
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putreg32(NVMC_CONFIG_REN, NRF52_NVMC_CONFIG);
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nrf_mem_barrier();
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}
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/****************************************************************************
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* Name: nrf_nvmc_write_bytes
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*
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* Description:
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* Write consecutive bytes to flash.
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*
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* Input Parameter:
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* address - Address to write to.
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* src - Pointer to data to copy from.
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* num_bytes - Number of bytes in src to write.
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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void nrf_nvmc_write_bytes(uint32_t address, const uint8_t *src,
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uint32_t num_bytes)
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{
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uint32_t i;
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for (i = 0; i < num_bytes; i++)
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{
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nrf_nvmc_write_byte(address + i, src[i]);
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}
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}
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/****************************************************************************
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* Name: nrf_nvmc_write_words
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*
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* Description:
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* Write consecutive words to flash.
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*
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* Input Parameter:
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* address - Address to write to.
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* src - Pointer to data to copy from.
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* num_words - Number of words in src to write.
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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void nrf_nvmc_write_words(uint32_t address, const uint32_t *src,
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uint32_t num_words)
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{
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uint32_t i;
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/* Enable write */
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putreg32(NVMC_CONFIG_WEN, NRF52_NVMC_CONFIG);
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nrf_mem_barrier();
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for (i = 0; i < num_words; i++)
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{
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((uint32_t *)address)[i] = src[i];
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wait_for_flash_ready();
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}
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/* Return to read-only mode */
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putreg32(NVMC_CONFIG_REN, NRF52_NVMC_CONFIG);
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nrf_mem_barrier();
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}
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