d938d49e5a
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5623 42af7a65-404d-4744-a932-0658087f49c3
315 lines
7.3 KiB
Plaintext
315 lines
7.3 KiB
Plaintext
#
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# For a description of the syntax of this configuration file,
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# see misc/tools/kconfig-language.txt.
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#
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if ARCH_ARM
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comment "ARM Options"
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choice
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prompt "ARM chip selection"
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default ARCH_CHIP_STM32
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config ARCH_CHIP_C5471
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bool "TMS320 C5471"
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select ARCH_ARM7TDMI
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select ARCH_HAVE_LOWVECTORS
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---help---
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TI TMS320 C5471, A180, or DA180 (ARM7TDMI)
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config ARCH_CHIP_CALYPSO
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bool "Calypso"
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select ARCH_ARM7TDMI
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select ARCH_HAVE_HEAP2
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select ARCH_HAVE_LOWVECTORS
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---help---
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TI Calypso-based cell phones (ARM7TDMI)
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config ARCH_CHIP_DM320
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bool "TMS320 DM320"
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select ARCH_ARM926EJS
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_MMU
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---help---
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TI DMS320 DM320 (ARM926EJS)
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config ARCH_CHIP_IMX
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bool "Freescale iMX"
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select ARCH_ARM920T
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select ARCH_HAVE_HEAP2
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_MMU
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---help---
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Freescale iMX architectures (ARM920T)
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config ARCH_CHIP_KINETIS
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bool "Freescale Kinetis"
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select ARCH_CORTEXM4
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select ARCH_HAVE_MPU
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select ARCH_HAVE_RAMFUNCS
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select ARCH_RAMFUNCS
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---help---
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Freescale Kinetis Architectures (ARM Cortex-M4)
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config ARCH_CHIP_LM
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bool "TI Stellaris"
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select ARCH_HAVE_MPU
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---help---
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TI Stellaris LMS3 architecutres (ARM Cortex-M3)
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config ARCH_CHIP_LPC17XX
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bool "NXP LPC17xx"
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select ARCH_CORTEXM3
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select ARCH_HAVE_CMNVECTOR
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select ARCH_HAVE_MPU
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---help---
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NXP LPC17xx architectures (ARM Cortex-M3)
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config ARCH_CHIP_LPC214X
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bool "NXP LPC214x"
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select ARCH_ARM7TDMI
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select ARCH_HAVE_LOWVECTORS
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---help---
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NXP LPC2145x architectures (ARM7TDMI)
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config ARCH_CHIP_LPC2378
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bool "NXP LPC2378"
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select ARCH_ARM7TDMI
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select ARCH_HAVE_LOWVECTORS
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---help---
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NXP LPC2145x architectures (ARM7TDMI)
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config ARCH_CHIP_LPC31XX
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bool "NXP LPC31XX"
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select ARCH_ARM926EJS
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_MMU
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---help---
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NPX LPC31XX architectures (ARM926EJS).
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config ARCH_CHIP_LPC43XX
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bool "NXP LPC43XX"
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select ARCH_CORTEXM4
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select ARCH_HAVE_CMNVECTOR
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select ARMV7M_CMNVECTOR
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select ARCH_HAVE_MPU
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---help---
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NPX LPC43XX architectures (ARM Cortex-M4).
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config ARCH_CHIP_SAM3U
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bool "Atmel AT91SAM3U"
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select ARCH_CORTEXM3
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select ARCH_HAVE_MPU
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---help---
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Atmel AT91SAM3U architectures (ARM Cortex-M3)
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config ARCH_CHIP_STM32
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bool "STMicro STM32"
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select ARCH_HAVE_CMNVECTOR
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select ARCH_HAVE_MPU
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select ARCH_HAVE_I2CRESET
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---help---
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STMicro STM32 architectures (ARM Cortex-M3/4).
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config ARCH_CHIP_STR71X
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bool "STMicro STR71x"
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select ARCH_ARM7TDMI
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select ARCH_HAVE_LOWVECTORS
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---help---
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STMicro STR71x architectures (ARM7TDMI).
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endchoice
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config ARCH_ARM7TDMI
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bool
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config ARCH_ARM926EJS
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bool
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config ARCH_ARM920T
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bool
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config ARCH_CORTEXM3
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bool
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select ARCH_IRQPRIO
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config ARCH_CORTEXM4
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bool
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select ARCH_IRQPRIO
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config ARCH_FAMILY
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string
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default "arm" if ARCH_ARM7TDMI || ARCH_ARM926EJS || ARCH_ARM920T
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default "armv7-m" if ARCH_CORTEXM3 || ARCH_CORTEXM4
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config ARCH_CHIP
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string
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default "c5471" if ARCH_CHIP_C5471
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default "calypso" if ARCH_CHIP_CALYPSO
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default "dm320" if ARCH_CHIP_DM320
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default "imx" if ARCH_CHIP_IMX
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default "kinetis" if ARCH_CHIP_KINETIS
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default "lm" if ARCH_CHIP_LM
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default "lpc17xx" if ARCH_CHIP_LPC17XX
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default "lpc214x" if ARCH_CHIP_LPC214X
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default "lpc2378" if ARCH_CHIP_LPC2378
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default "lpc31xx" if ARCH_CHIP_LPC31XX
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default "lpc43xx" if ARCH_CHIP_LPC43XX
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default "sam3u" if ARCH_CHIP_SAM3U
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default "stm32" if ARCH_CHIP_STM32
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default "str71x" if ARCH_CHIP_STR71X
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config ARMV7M_USEBASEPRI
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bool "Use BASEPRI Register"
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default n
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depends on ARCH_CORTEXM3 || ARCH_CORTEXM4
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---help---
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Use the BASEPRI register to enable and disable able interrupts. By
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default, the PRIMASK register is used for this purpose. This
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usually results in hardfaults that are properly handling by the
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RTOS. Using the BASEPRI register will avoid these hardfault.
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That is needed primarily for integration with some toolchains.
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config ARCH_HAVE_CMNVECTOR
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bool
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config ARMV7M_CMNVECTOR
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bool "Use common ARMv7-M vectors"
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default n
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depends on ARCH_HAVE_CMNVECTOR
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---help---
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Some architectures use their own, built-in vector logic. Some use only
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the common vector logic. Some can use either their own built-in vector
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logic or the common vector logic. This applies only to ARMv7-M
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architectures.
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config ARCH_FPU
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bool "FPU support"
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default y
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depends on ARCH_CORTEXM4
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---help---
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Build in support for the ARM Cortex-M4 Floating Point Unit (FPU).
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Check your chip specifications first; not all Cortex-M4 chips support the FPU.
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config ARCH_HAVE_MPU
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bool
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config ARMV7M_MPU
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bool "MPU support"
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default n
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depends on ARCH_HAVE_MPU
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---help---
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Build in support for the ARM Cortex-M3/4 Memory Protection Unit (MPU).
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Check your chip specifications first; not all Cortex-M3/4 chips support the MPU.
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config ARCH_HAVE_LOWVECTORS
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bool
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config ARCH_LOWVECTORS
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bool "Vectors in low memory"
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default n
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depends on ARCH_HAVE_LOWVECTORS
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---help---
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Support ARM vectors in low memory.
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config ARCH_HAVE_MMU
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bool
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config PGTABLE_VADDR
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hex "Page table virtual address"
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depends on ARCH_HAVE_MMU
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---help---
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Page table virtual address (might be defined in the board.h file). Not
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applicable to all architectures.
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config ARCH_ROMPGTABLE
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bool "ROM page table"
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default n
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depends on ARCH_HAVE_MMU
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---help---
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Support a fixed memory mapping use a (read-only) page table in ROM/FLASH.
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config PAGING
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bool "On-demand paging"
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default n
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depends on ARCH_HAVE_MMU && !ARCH_ROMPGTABLE
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---help---
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If set =y in your configation file, this setting will enable the on-demand
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paging feature as described in http://www.nuttx.org/NuttXDemandPaging.html.
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config BOARD_LOOPSPERMSEC
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int "Delay loops per millisecond"
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default 5000
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---help---
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Delay loops nust be calibrated for correct operation.
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config ARCH_CALIBRATION
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bool "Calibrate delay loop"
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default n
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---help---
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Enables some built in instrumentation that causes a 100 second delay
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during boot-up. This 100 second delay serves no purpose other than it
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allows you to calibratre BOARD_LOOPSPERMSEC. You simply use a stop
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watch to measure the 100 second delay then adjust BOARD_LOOPSPERMSEC until
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the delay actually is 100 seconds.
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config DEBUG_HARDFAULT
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bool "Verbose Hard-Fault Debug"
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default n
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depends on DEBUG && (ARCH_CORTEXM3 || ARCH_CORTEXM4)
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---help---
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Enables verbose debug output when a hard fault is occurs. This verbose
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output is sometimes helpful when debugging difficult hard fault problems,
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but may be more than you typcially want to see.
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if ARCH_CORTEXM3 || ARCH_CORTEXM4
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source arch/arm/src/armv7-m/Kconfig
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endif
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if ARCH_ARM7TDMI || ARCH_ARM926EJS
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source arch/arm/src/arm/Kconfig
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endif
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if ARCH_CHIP_C5471
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source arch/arm/src/c5471/Kconfig
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endif
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if ARCH_CHIP_CALYPSO
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source arch/arm/src/calypso/Kconfig
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endif
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if ARCH_CHIP_DM320
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source arch/arm/src/dm320/Kconfig
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endif
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if ARCH_CHIP_IMX
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source arch/arm/src/imx/Kconfig
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endif
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if ARCH_CHIP_KINETIS
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source arch/arm/src/kinetis/Kconfig
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endif
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if ARCH_CHIP_LM
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source arch/arm/src/lm/Kconfig
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endif
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if ARCH_CHIP_LPC17XX
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source arch/arm/src/lpc17xx/Kconfig
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endif
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if ARCH_CHIP_LPC214X
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source arch/arm/src/lpc214x/Kconfig
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endif
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if ARCH_CHIP_LPC2378
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source arch/arm/src/lpc2378/Kconfig
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endif
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if ARCH_CHIP_LPC31XX
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source arch/arm/src/lpc31xx/Kconfig
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endif
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if ARCH_CHIP_LPC43XX
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source arch/arm/src/lpc43xx/Kconfig
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endif
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if ARCH_CHIP_SAM3U
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source arch/arm/src/sam3u/Kconfig
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endif
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if ARCH_CHIP_STM32
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source arch/arm/src/stm32/Kconfig
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endif
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if ARCH_CHIP_STR71X
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source arch/arm/src/str71x/Kconfig
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endif
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endif
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