114758e518
This patch adds documentation for both stm32wl5 chip family and nucleo-wl55jc board. I've kept the same directory structure for arm/stm32 as in arch/ and boards/ directories. Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
135 lines
3.2 KiB
ReStructuredText
135 lines
3.2 KiB
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========
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STM32WL5
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========
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The STM32WL5 is a dual CPU (not core!) chip based on ARM Cortex-M4 and
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Cortex-M0 with integrated sub-GHz radio for LoRa (G)FSK, (G)MSK and BPSK
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modulations.
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Only Cortex-M0 has access to radio peripheral. Pipe between CPUs exists
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so that radio packets can be exchanged between CPUs. Chip was designed
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so that Cortex-M0 cpu handles radio traffic while Cortex-M4 cpu handles
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actions based on traffic received. All other peripherals are shared
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(like uart, spi, i2c) and both CPUs can initiate them, but it's required
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to be done only by one of them.
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Supported MCUs
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=============
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STM32WL5 has only two chips in family. STM32WL55 and STM32WL54. Only
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difference between them is that STM32WL55 has support for LoRa while
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Stm32WL54 does not.
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Peripheral Support
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==================
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The following list indicates peripherals supported in NuttX:
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========== ======= =====
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Peripheral Support Notes
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========== ======= =====
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IRQs Yes
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GPIO Yes
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EXTI No
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HSE Yes
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PLL Yes Tested @ 48MHz
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HSI Yes Not tested
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MSI Yes Not tested
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LSE Yes Not tested
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RCC Yes All registers defined, not all peripherals enabled
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SYSCFG Yes All registers defined, remapping not tested
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USART Yes
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LPUART Yes full speed with HSE works, low power mode with LSE not implemented
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DMA No
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SRAM2 No
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SPI No
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I2C No
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RTC No
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Timers No
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PM No
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AES No
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RNG No
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CRC No
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WWDG No
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IWDG No
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ADC No
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DAC No
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IPCC No
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Radio@CPU0 No
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========== ======= =====
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PLL
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---
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PLL is a module that allows MCU to generate higher (or lower) clocks than
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provided by the source. For example it can be used to drive system clock
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with 48MHz when 8MHz HSE crystal is installed.
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LSE
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---
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Low speed external crystal. Can be used to clock RTC and/or independent
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watchdog (IWDG). LSE is usually 32768Hz high precision crystal.
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HSI
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---
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High speed internal clock. Can be used as a source for sysclk and
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internal buses (APB, AHB). This clock source is not as precise or
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as stable as HSE, but it cuts down costs by avoiding external
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hardware (crystal and capacitors) and is usually good enough if
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operating temperatures are stable. It's clock is fixed at 16MHz.
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MSI
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---
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Adjustable internal clock. Can be adjusted by software, but it's
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accuracy and stability is even lower than HSI.
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HSE
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---
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High speed external crystal. Can be used to clock sysclk and internal
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buses (APB, AHB). External crystal is more precise and more stable
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than HSI.
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RCC
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---
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Reset and clock control. Enables or disables specific peripherals.
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SYSCFG
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------
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System configuration controller. Can be used to remap memory or
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manage external interrupts.
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GPIO
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----
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Pins can be configured using :c:func:`stm32wl5_configgpio` function. Writing
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to pins is done by :c:func:`stm32wl5_gpiowrite` function and reading is done
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by :c:func:`stm32wl5_gpioread`.
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UART
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----
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Universal Asynchronous Receiver/Transmitter module. UART is initialized
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automatically during MCU boot.
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IPCC
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----
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Inter-processor communication controller. IPCC is used to exchange data
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between Cortex-M4 and Cortex-M0 CPUs.
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Supported Boards
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================
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.. toctree::
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:glob:
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:maxdepth: 1
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boards/*/*
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