97 lines
4.5 KiB
C
97 lines
4.5 KiB
C
/********************************************************************************************
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* arch/arm/src/lpc54xx/lpc54_rtc.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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********************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC54XX_CHIP_LPC54_RTC_H
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#define __ARCH_ARM_SRC_LPC54XX_CHIP_LPC54_RTC_H
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/********************************************************************************************
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* Included Files
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********************************************************************************************/
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#include <nuttx/config.h>
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#include "chip/lpc54_memorymap.h"
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/********************************************************************************************
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* Pre-processor Definitions
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********************************************************************************************/
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#define LPC54_RTC_NGPREGS 8 /* Nubmer of general purpose registers */
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/* Register offsets *************************************************************************/
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#define LPC54_RTC_CTRL_OFFSET 0x0000 /* RTC control */
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#define LPC54_RTC_MATCH_OFFSET 0x0004 /* RTC match */
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#define LPC54_RTC_COUNT_OFFSET 0x0008 /* RTC counter */
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#define LPC54_RTC_WAKE_OFFSET 0x000c /* High-resolution/wake-up timer control */
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/* General purpose registers */
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#define LPC54_RTC_GPREG_OFFSET(n) (0x0040 + ((n) << 2))
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/* Register addresses ***********************************************************************/
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#define LPC54_RTC_CTRL (LPC54_RTC_BASE + LPC54_RTC_CTRL_OFFSET)
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#define LPC54_RTC_MATCH (LPC54_RTC_BASE + LPC54_RTC_MATCH_OFFSET)
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#define LPC54_RTC_COUNT (LPC54_RTC_BASE + LPC54_RTC_COUNT_OFFSET)
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#define LPC54_RTC_WAKE (LPC54_RTC_BASE + LPC54_RTC_WAKE_OFFSET)
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/* General purpose registers */
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#define LPC54_RTC_GPREG(n) (LPC54_RTC_BASE + LPC54_RTC_GPREG_OFFSET(n))
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/* Register bit definitions *****************************************************************/
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/* RTC control */
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#define RTC_CTRL_SWRESET (1 << 0) /* Bit 0: Software reset control */
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#define RTC_CTRL_ALARM1HZ (1 << 2) /* Bit 2: RTC 1 Hz timer alarm flag status */
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#define RTC_CTRL_WAKE1KHZ (1 << 3) /* Bit 3: RTC 1 kHz timer wake-up flag status */
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#define RTC_CTRL_ALARMDPDEN (1 << 4) /* Bit 4: RTC 1 Hz timer alarm enable for deep power-down */
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#define RTC_CTRL_WAKEDPDEN (1 << 5) /* Bit 5: RTC 1 kHz timer wake-up enable for deep power-down */
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#define RTC_CTRL_RTC1KHZEN (1 << 6) /* Bit 6: RTC 1 kHz clock enable */
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#define RTC_CTRL_RTCEN (1 << 7) /* Bit 7: RTC enable */
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#define RTC_CTRL_OSCPD (1 << 8) /* Bit 8: RTC oscillator power-down control */
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/* RTC match (32-bit timer match value) */
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/* RTC counter (32-bit counter value) */
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/* High-resolution/wake-up timer control */
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#define RTC_WAKE_MASK 0xffff /* Bits 0-15: 16 hi-resoution/wake-up timer */
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/* General purpose registers (32-bit value) */
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#endif /* __ARCH_ARM_SRC_LPC54XX_CHIP_LPC54_RTC_H */
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