fangxinyong 13cb355a4e arm/armv[7|8]-m: add syn barrier for MPU ops ... Execute data and instruction sync barriers after writing MPU register, to ensure MPU setting take effects that the new changes are seen. testing in lm3s6965-ek:qemu-protected Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>		2024-08-21 02:57:25 +08:00
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include	armv7-a/irq: add up_irq_disable method implementation	2024-08-21 02:53:04 +08:00
src	arm/armv[7|8]-m: add syn barrier for MPU ops	2024-08-21 02:57:25 +08:00
CMakeLists.txt	build: add initial cmake build system	2023-07-08 13:50:48 +08:00
Kconfig	arm:Select ram vector on armv6m	2024-08-12 00:09:56 +08:00