197 lines
7.0 KiB
C
197 lines
7.0 KiB
C
/****************************************************************************
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* arch/arm/src/lpc17/lpc17_emc.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "chip/lpc17_syscon.h"
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#include "lpc17_gpio.h"
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#include "lpc17_emc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const lpc17_pinset_t g_emcctrl[] =
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{
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GPIO_EMC_OE, GPIO_EMC_WE,
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GPIO_EMC_BLS0, GPIO_EMC_BLS1, GPIO_EMC_BLS2, GPIO_EMC_BLS3,
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GPIO_EMC_CS0, GPIO_EMC_CS1, GPIO_EMC_CS2, GPIO_EMC_CS3,
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GPIO_EMC_CAS, GPIO_EMC_RAS,
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GPIO_EMC_CLK0, GPIO_EMC_CLK1,
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GPIO_EMC_DYCS0, GPIO_EMC_DYCS1, GPIO_EMC_DYCS2, GPIO_EMC_DYCS3,
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GPIO_EMC_CKE0, GPIO_EMC_CKE1, GPIO_EMC_CKE2, GPIO_EMC_CKE3,
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GPIO_EMC_DQM0, GPIO_EMC_DQM1, GPIO_EMC_DQM2, GPIO_EMC_DQM3,
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};
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#define EMC_NCTRL (sizeof(g_emcctrl) / sizeof(lpc17_pinset_t))
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static const lpc17_pinset_t g_emcdata[] =
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{
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GPIO_EMC_D0, GPIO_EMC_D1, GPIO_EMC_D2, GPIO_EMC_D3,
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GPIO_EMC_D4, GPIO_EMC_D5, GPIO_EMC_D6, GPIO_EMC_D7,
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GPIO_EMC_D8, GPIO_EMC_D9, GPIO_EMC_D10, GPIO_EMC_D11,
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GPIO_EMC_D12, GPIO_EMC_D13, GPIO_EMC_D14, GPIO_EMC_D15,
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GPIO_EMC_D16, GPIO_EMC_D17, GPIO_EMC_D18, GPIO_EMC_D19,
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GPIO_EMC_D20, GPIO_EMC_D21, GPIO_EMC_D22, GPIO_EMC_D23,
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GPIO_EMC_D24, GPIO_EMC_D25, GPIO_EMC_D26, GPIO_EMC_D27,
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GPIO_EMC_D28, GPIO_EMC_D29, GPIO_EMC_D30, GPIO_EMC_D31,
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};
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/* You can limit the number of data lines configured by defining
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* BOARD_NDATA in your board.h header file.
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*/
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#ifdef BOARD_NDATA
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# define EMC_NDATA BOARD_NDATA
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#else
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# define EMC_NDATA (sizeof(g_emcdata) / sizeof(lpc17_pinset_t))
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#endif
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static const lpc17_pinset_t g_emcaddr[] =
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{
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GPIO_EMC_A0, GPIO_EMC_A1, GPIO_EMC_A2, GPIO_EMC_A3,
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GPIO_EMC_A4, GPIO_EMC_A5, GPIO_EMC_A6, GPIO_EMC_A7,
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GPIO_EMC_A8, GPIO_EMC_A9, GPIO_EMC_A10, GPIO_EMC_A11,
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GPIO_EMC_A12, GPIO_EMC_A13, GPIO_EMC_A14, GPIO_EMC_A15,
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GPIO_EMC_A16, GPIO_EMC_A17, GPIO_EMC_A18, GPIO_EMC_A19,
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GPIO_EMC_A20, GPIO_EMC_A21, GPIO_EMC_A22, GPIO_EMC_A23,
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GPIO_EMC_A24, GPIO_EMC_A25
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};
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/* You can limit the number of address lines configured by defining
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* BOARD_NADDR in your board.h header file.
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*/
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#ifdef BOARD_NADDR
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# define EMC_NADDR BOARD_NADDR
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#else
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# define EMC_NADDR (sizeof(g_emcaddr) / sizeof(lpc17_pinset_t))
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: lpc17_emcinitialize
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*
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* Description:
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* Initialize EMC clocking and pin configuration. This function should be
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* called once when the system first boots in order to make the EMC
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* operational.
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*
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****************************************************************************/
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void lpc17_emcinitialize(void)
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{
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uint32_t regval;
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int i;
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/* Enable clocking for the EMC */
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regval = getreg32(LPC17_SYSCON_PCONP);
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regval |= SYSCON_PCONP_PCEMC;
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putreg32(regval, LPC17_SYSCON_PCONP);
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/* Set EMC delay values:
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*
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* CMDDLY: Programmable delay value for EMC outputs in command delayed
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* mode. The delay amount is roughly CMDDLY * 250 picoseconds.
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* FBCLKDLY: Programmable delay value for the feedback clock that controls
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* input data sampling. The delay amount is roughly (FBCLKDLY+1) * 250
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* picoseconds.
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* CLKOUT0DLY: Programmable delay value for the CLKOUT0 output. This would
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* typically be used in clock delayed mode. The delay amount is roughly
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* (CLKOUT0DLY+1) * 250 picoseconds.
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* CLKOUT1DLY: Programmable delay value for the CLKOUT1 output. This would
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* typically be used in clock delayed mode. The delay amount is roughly
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* (CLKOUT1DLY+1) * 250 picoseconds.
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*/
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regval = SYSCON_EMCDLYCTL_CMDDLY(BOARD_CMDDLY) |
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SYSCON_EMCDLYCTL_FBCLKDLY(BOARD_FBCLKDLY) |
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SYSCON_EMCDLYCTL_CLKOUT0DLY(BOARD_CLKOUT0DLY) |
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SYSCON_EMCDLYCTL_CLKOUT1DLY(BOARD_CLKOUT1DLY);
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putreg32(regval, LPC17_SYSCON_EMCDLYCTL);
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/* Enable the EMC */
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putreg32(EMC_CONTROL_E, LPC17_EMC_CONTROL);
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putreg32(0, LPC17_EMC_CONFIG);
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/* Configure EMC pins */
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/* Control signals */
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for (i = 0; i < EMC_NCTRL; i++)
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{
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lpc17_configgpio(g_emcctrl[i]);
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}
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/* Data lines */
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for (i = 0; i < EMC_NDATA; i++)
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{
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lpc17_configgpio(g_emcdata[i]);
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}
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/* Address lines */
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for (i = 0; i < EMC_NADDR; i++)
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{
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lpc17_configgpio(g_emcaddr[i]);
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}
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}
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