e5dfd805e6
Add support for LPC40xx family chips
* Corrected a few peripheral definitions and pin functions for the LPC17xx family.
Added configuration options, chip definitions, and additional pin functions for the LPC40xx family.
Added board configurations for Embedded Artists LPC4088 Quickstart board and LPC4088 Developer's kit. These configurations are still something of a work in progress. In particular, the LCD functionality is untested.
* First pass rename in *.c and *.h files.
* Renamed LPC17XX to LPC17XX_40XX in config files
* Rplaced LPC17xx with LPC17xx/LPC40xx in .c files
* Replaced LPC17xx with LPC17xx/LPC40xx in .h files
* Updated some documentation
* Working on moving directories
* moved arch/arm/src/lpc17xx and arch/arm/include/lpc17xx to lpc17xx_40xx
* Renamed LPC17_* constants / configuration options to LPC17_40_*
* Updated chip family name defines
* Renamed some chip-specific files
* Updated references to renamed files
* Updated references to lpc17_ to lpc17_40_
* Renamed source files from lpc17_* to lpc17_40_*
* Clean up white space
Approved-by: Gregory Nutt <gnutt@nuttx.org>
82 lines
3.3 KiB
C
82 lines
3.3 KiB
C
/************************************************************************************
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* arch/arm/src/lpc17xx_40xx/chip.h
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*
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* Copyright (C) 2010-2011, 2013, 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC17XX_40XX_CHIP_H
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#define __ARCH_ARM_SRC_LPC17XX_40XX_CHIP_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "nvic.h"
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/* Include the chip capabilities file */
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#include <arch/lpc17xx_40xx/chip.h>
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/* Include the chip interrupt definition file */
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#include <arch/lpc17xx_40xx/irq.h>
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/* Include the memory map file. Other chip hardware files should then include
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* this file for the proper setup.
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*/
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#include "hardware/lpc17_40_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Provide the required number of peripheral interrupt vector definitions as well.
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* The definition LPC17_40_IRQ_NEXTINT simply comes from the chip-specific IRQ header
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* file included by arch/lpc17xx_40xx/irq.h.
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*/
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#define ARMV7M_PERIPHERAL_INTERRUPTS LPC17_40_IRQ_NEXTINT
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/* Vector Table Offset Register (VECTAB). Redefine the mask defined in
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* arch/arm/src/armv7-m/nvic.h; The LPC178x/7x User manual definitions
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* do not match the ARMv7M field definitions. Any bits set above bit
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* 29 would be an error and apparently the register wants 8- not 6-bit
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* alignment.
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*/
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#undef NVIC_VECTAB_TBLOFF_MASK
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#define NVIC_VECTAB_TBLOFF_MASK (0x3fffff00)
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#endif /* __ARCH_ARM_SRC_LPC17XX_40XX_CHIP_H */
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