217 lines
5.6 KiB
ArmAsm
217 lines
5.6 KiB
ArmAsm
/****************************************************************************
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* arch/risc-v/src/fe310/fe310_head.S
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/rv32im/irq.h>
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#include "chip.h"
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#include "fe310_memorymap.h"
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#include "riscv_internal.h"
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/****************************************************************************
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* Public Symbols
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****************************************************************************/
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.global exception_common
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/* Imported symbols */
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.extern __trap_vec
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.section .text
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.global __start
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__start:
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/* Set stack pointer to the idle thread stack */
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la sp, FE310_IDLESTACK_TOP
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/* Disable all interrupts (i.e. timer, external) in mie */
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csrw mie, zero
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/* Initialize the Machine Trap Vector */
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la t0, __trap_vec
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csrw mtvec, t0
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#ifdef CONFIG_STACK_COLORATION
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/* t0 = start of IDLE stack; t1 = top of the stack; t2 = coloration */
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la t0, FE310_IDLESTACK_BASE
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la t1, FE310_IDLESTACK_TOP
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li t2, STACK_COLOR
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1:
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sw t2, 0(t0)
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addi t0, t0, 4
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bne t0, t1, 1b
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#endif
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/* Jump to __fe310_start */
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jal x1, __fe310_start
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/* We shouldn't return from __fe310_start */
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.global _init
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.global _fini
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_init:
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_fini:
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/* These don't have to do anything since we use init_array/fini_array. */
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ret
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/****************************************************************************
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* Name: exception_common
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****************************************************************************/
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exception_common:
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addi sp, sp, -XCPTCONTEXT_SIZE
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sw x1, 1*4(sp) /* ra */
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sw x3, 3*4(sp) /* gp */
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sw x4, 4*4(sp) /* tp */
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sw x5, 5*4(sp) /* t0 */
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sw x6, 6*4(sp) /* t1 */
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sw x7, 7*4(sp) /* t2 */
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sw x8, 8*4(sp) /* s0 */
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sw x9, 9*4(sp) /* s1 */
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sw x10, 10*4(sp) /* a0 */
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sw x11, 11*4(sp) /* a1 */
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sw x12, 12*4(sp) /* a2 */
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sw x13, 13*4(sp) /* a3 */
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sw x14, 14*4(sp) /* a4 */
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sw x15, 15*4(sp) /* a5 */
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sw x16, 16*4(sp) /* a6 */
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sw x17, 17*4(sp) /* a7 */
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sw x18, 18*4(sp) /* s2 */
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sw x19, 19*4(sp) /* s3 */
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sw x20, 20*4(sp) /* s4 */
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sw x21, 21*4(sp) /* s5 */
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sw x22, 22*4(sp) /* s6 */
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sw x23, 23*4(sp) /* s7 */
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sw x24, 24*4(sp) /* s8 */
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sw x25, 25*4(sp) /* s9 */
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sw x26, 26*4(sp) /* s10 */
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sw x27, 27*4(sp) /* s11 */
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sw x28, 28*4(sp) /* t3 */
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sw x29, 29*4(sp) /* t4 */
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sw x30, 30*4(sp) /* t5 */
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sw x31, 31*4(sp) /* t6 */
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csrr s0, mstatus
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sw s0, 32*4(sp) /* mstatus */
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addi s0, sp, XCPTCONTEXT_SIZE
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sw s0, 2*4(sp) /* original SP */
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/* Setup arg0(exception cause), arg1(context) */
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csrr a0, mcause /* exception cause */
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csrr s0, mepc
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sw s0, 0(sp) /* exception PC */
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mv a1, sp /* context = sp */
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#if CONFIG_ARCH_INTERRUPTSTACK > 15
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/* Switch to interrupt stack */
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lui sp, %hi(g_intstacktop)
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addi sp, sp, %lo(g_intstacktop)
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#endif
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/* Call interrupt handler in C */
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jal x1, fe310_dispatch_irq
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/* If context switch is needed, return a new sp */
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mv sp, a0
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lw s0, 0(sp) /* restore mepc */
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csrw mepc, s0
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lw s0, 32*4(sp) /* restore mstatus */
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csrw mstatus, s0
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lw x3, 3*4(sp) /* gp */
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lw x4, 4*4(sp) /* tp */
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lw x5, 5*4(sp) /* t0 */
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lw x6, 6*4(sp) /* t1 */
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lw x7, 7*4(sp) /* t2 */
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lw x8, 8*4(sp) /* s0 */
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lw x9, 9*4(sp) /* s1 */
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lw x10, 10*4(sp) /* a0 */
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lw x11, 11*4(sp) /* a1 */
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lw x12, 12*4(sp) /* a2 */
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lw x13, 13*4(sp) /* a3 */
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lw x14, 14*4(sp) /* a4 */
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lw x15, 15*4(sp) /* a5 */
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lw x16, 16*4(sp) /* a6 */
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lw x17, 17*4(sp) /* a7 */
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lw x18, 18*4(sp) /* s2 */
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lw x19, 19*4(sp) /* s3 */
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lw x20, 20*4(sp) /* s4 */
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lw x21, 21*4(sp) /* s5 */
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lw x22, 22*4(sp) /* s6 */
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lw x23, 23*4(sp) /* s7 */
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lw x24, 24*4(sp) /* s8 */
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lw x25, 25*4(sp) /* s9 */
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lw x26, 26*4(sp) /* s10 */
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lw x27, 27*4(sp) /* s11 */
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lw x28, 28*4(sp) /* t3 */
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lw x29, 29*4(sp) /* t4 */
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lw x30, 30*4(sp) /* t5 */
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lw x31, 31*4(sp) /* t6 */
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lw x1, 1*4(sp) /* ra */
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lw sp, 2*4(sp) /* restore original sp */
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/* Return from Machine Interrupt */
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mret
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/************************************************************************************
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* Name: g_intstackalloc and g_intstacktop
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************************************************************************************/
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#if CONFIG_ARCH_INTERRUPTSTACK > 15
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.bss
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.balign 16
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.global g_intstackalloc
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.global g_intstacktop
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.type g_intstackalloc, object
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.type g_intstacktop, object
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g_intstackalloc:
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.skip ((CONFIG_ARCH_INTERRUPTSTACK + 8) & ~15)
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g_intstacktop:
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.size g_intstacktop, 0
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.size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~15)
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#endif
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