167040b9e1
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3336 42af7a65-404d-4744-a932-0658087f49c3
179 lines
5.0 KiB
C
Executable File
179 lines
5.0 KiB
C
Executable File
/****************************************************************************
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* arch/x86/include/i486/irq.h
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_X86_INCLUDE_I486_IRQ_H
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#define __ARCH_X86_INCLUDE_I486_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#ifdef __ASSEMBLY__
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# include <stdint.h>
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# include <stdbool.h>
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# include <arch/arch.h>
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#endif
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* Storage order: %ebx, $esi, %edi, %ebp, sp, and return PC */
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#ifdef __ASSEMBLY__
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# define REG_EBX (0*4)
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# define REG_ESI (1*4)
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# define REG_EDI (2*4)
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# define REG_EBP (3*4)
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# define REG_SP (4*4)
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# define REG_PC (5*4)
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#else
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# define REG_EBX (0)
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# define REG_ESI (1)
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# define REG_EDI (2)
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# define REG_EBP (3)
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# define REG_SP (4)
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# define REG_PC (5)
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#endif /* __ASSEMBLY__ */
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#define XCPTCONTEXT_REGS (6)
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#define XCPTCONTEXT_SIZE (6 * XCPTCONTEXT_REGS)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* This struct defines the way the registers are stored */
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#ifndef __ASSEMBLY__
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struct xcptcontext
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{
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void *sigdeliver; /* Actual type is sig_deliver_t */
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/* Storage order: %ebx, $esi, %edi, %ebp, sp, and return PC */
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uint32_t regs[XCPTCONTEXT_REGS];
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};
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#endif
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Get the current FLAGS register contents */
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static inline irqstate_t irqflags()
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{
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irqstate_t flags;
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asm volatile(
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"\tpushf\n"
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"\tpop %0\n"
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: "=rm" (flags)
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:
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: "memory");
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return flags;
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}
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/* Get a sample of the FLAGS register, determine if interrupts are disabled */
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static inline bool irqdisabled(irqstate_t flags)
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{
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return ((flags & X86_FLAGS_IF) == 0);
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}
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/* Disable interrupts unconditionally */
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static inline void irqdisable(void)
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{
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asm volatile("cli": : :"memory");
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}
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/* Enable interrupts unconditionally */
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static inline void irqenable(void)
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{
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asm volatile("sti": : :"memory");
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}
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/* Disable interrupts, but return previous interrupt state */
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static inline irqstate_t irqsave(void)
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{
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irqstate_t flags = irqflags();
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irqdisable();
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return flags;
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}
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/* Conditionally disable interrupts */
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static inline void irqrestore(irqstate_t flags)
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{
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if (irqdisabled(flags))
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{
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irqdisable();
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}
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}
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/****************************************************************************
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* Public Variables
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_X86_INCLUDE_I486_IRQ_H */
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