Abdelatif Guettouche 1719e9df94 arch/xtensa/esp32: Add the RTC Slow memory as a separate heap. ... This memory region can be accessed by both I & D buses, so the heap can be used for data storage and code execution. Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>		2021-06-23 08:37:01 +09:00
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.gitignore	boards/xtensa/esp32: Initial support for the ESP32 Ethernet Kit.	2020-12-10 12:31:17 -06:00
esp32_flash.ld	arch/xtensa/esp32: Add the RTC Slow memory as a separate heap.	2021-06-23 08:37:01 +09:00
esp32_iram.ld	arch/xtensa/esp32: Add the RTC Slow memory as a separate heap.	2021-06-23 08:37:01 +09:00
esp32_peripherals.ld	boards/xtensa/esp32: Initial support for the ESP32 Ethernet Kit.	2020-12-10 12:31:17 -06:00
esp32_rom.ld	arch/esp32: Fix error: Mixed case identifier found	2021-04-10 12:00:06 +01:00
esp32.template.ld	arch/xtensa/esp32: Add the RTC Slow memory as a separate heap.	2021-06-23 08:37:01 +09:00
gnu-elf.ld	boards/xtensa/esp32: Initial support for the ESP32 Ethernet Kit.	2020-12-10 12:31:17 -06:00
Make.defs	esp32: move common XTAL and RUN_IRAM configs to ESP32 KConfig	2021-04-07 21:45:48 +01:00