291 lines
7.1 KiB
Plaintext
291 lines
7.1 KiB
Plaintext
############################################################################
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# arch/arm/src/stm32/Make.defs
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#
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# Copyright (C) 2009, 2011-2016, 2018 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
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CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
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ifeq ($(CONFIG_ARCH_SETJMP_H),y)
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ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
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CMN_ASRCS += arm_setjmp.S
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endif
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endif
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CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
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CMN_CSRCS += arm_exit.c arm_hardfault.c arm_initialize.c arm_initialstate.c
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CMN_CSRCS += arm_interruptcontext.c arm_memfault.c arm_modifyreg8.c
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CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
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CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
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CMN_CSRCS += arm_trigger_irq.c arm_unblocktask.c arm_udelay.c arm_usestack.c
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CMN_CSRCS += arm_doirq.c arm_vfork.c
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ifeq ($(CONFIG_STM32_TICKLESS_SYSTICK),y)
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CMN_CSRCS += arm_systick.c
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endif
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ifneq ($(CONFIG_TIMER_ARCH),y)
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CMN_CSRCS += arm_mdelay.c
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endif
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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CMN_CSRCS += arm_stackcheck.c
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endif
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ifeq ($(CONFIG_ARM_LWL_CONSOLE),y)
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CMN_CSRCS += arm_lwl_console.c
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endif
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += arm_lazyexception.S
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else
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CMN_ASRCS += arm_exception.S
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endif
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CMN_CSRCS += arm_vectors.c
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ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
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CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
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endif
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ifeq ($(CONFIG_ARM_MPU),y)
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CMN_CSRCS += arm_mpu.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CMN_CSRCS += arm_task_start.c arm_pthread_start.c
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CMN_CSRCS += arm_signal_dispatch.c
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CMN_UASRCS += arm_signal_handler.S
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endif
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ifeq ($(CONFIG_STACK_COLORATION),y)
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CMN_CSRCS += arm_checkstack.c
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_ASRCS += arm_fpu.S
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CMN_CSRCS += arm_copyarmstate.c
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endif
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ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
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CMN_CSRCS += arm_itm_syslog.c
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endif
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CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c
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CHIP_CSRCS += stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c
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CHIP_CSRCS += stm32_irq.c stm32_dma.c stm32_lowputc.c
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CHIP_CSRCS += stm32_serial.c stm32_spi.c stm32_i2s.c stm32_sdio.c stm32_tim.c
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CHIP_CSRCS += stm32_waste.c stm32_ccm.c stm32_uid.c stm32_capture.c
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CHIP_CSRCS += stm32_dfumode.c
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ifeq ($(CONFIG_TIMER),y)
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CHIP_CSRCS += stm32_tim_lowerhalf.c
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endif
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ifdef CONFIG_STM32_TICKLESS_TIMER
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CHIP_CSRCS += stm32_tickless.c
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else
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CHIP_CSRCS += stm32_timerisr.c
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endif
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ifeq ($(CONFIG_STM32_ONESHOT),y)
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CHIP_CSRCS += stm32_oneshot.c stm32_oneshot_lowerhalf.c
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endif
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ifeq ($(CONFIG_STM32_FREERUN),y)
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CHIP_CSRCS += stm32_freerun.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += stm32_userspace.c stm32_mpuinit.c
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endif
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ifeq ($(CONFIG_STM32_CCM_PROCFS),y)
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CHIP_CSRCS += stm32_procfs_ccm.c
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endif
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ifeq ($(CONFIG_STM32_HAVE_IP_I2C_V1),y)
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ifeq ($(CONFIG_STM32_I2C_ALT),y)
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CHIP_CSRCS += stm32_i2c_alt.c
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else ifeq ($(CONFIG_STM32_STM32F4XXX),y)
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CHIP_CSRCS += stm32f40xxx_i2c.c
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else
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CHIP_CSRCS += stm32_i2c.c
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endif
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else ifeq ($(CONFIG_STM32_HAVE_IP_I2C_V2),y)
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CHIP_CSRCS += stm32_i2c_v2.c
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endif
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ifeq ($(CONFIG_USBDEV),y)
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ifeq ($(CONFIG_STM32_USB),y)
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CHIP_CSRCS += stm32_usbdev.c
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endif
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ifeq ($(CONFIG_STM32_OTGFS),y)
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CHIP_CSRCS += stm32_otgfsdev.c
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endif
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ifeq ($(CONFIG_STM32_OTGHS),y)
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CHIP_CSRCS += stm32_otghsdev.c
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endif
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endif
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ifeq ($(CONFIG_STM32_USBHOST),y)
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ifeq ($(CONFIG_STM32_OTGFS),y)
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CHIP_CSRCS += stm32_otgfshost.c
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endif
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ifeq ($(CONFIG_STM32_OTGHS),y)
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CHIP_CSRCS += stm32_otghshost.c
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endif
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ifeq ($(CONFIG_USBHOST_TRACE),y)
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CHIP_CSRCS += stm32_usbhost.c
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else
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ifeq ($(CONFIG_DEBUG_USB),y)
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CHIP_CSRCS += stm32_usbhost.c
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endif
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endif
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endif
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CHIP_CSRCS += stm32_idle.c
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endif
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CHIP_CSRCS += stm32_pmstop.c stm32_pmstandby.c stm32_pmsleep.c
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ifneq ($(CONFIG_ARCH_CUSTOM_PMINIT),y)
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CHIP_CSRCS += stm32_pminitialize.c
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endif
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ifeq ($(CONFIG_STM32_ETHMAC),y)
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CHIP_CSRCS += stm32_eth.c
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endif
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ifeq ($(CONFIG_STM32_PWR),y)
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CHIP_CSRCS += stm32_pwr.c stm32_exti_pwr.c
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endif
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ifeq ($(CONFIG_STM32_RTC),y)
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CHIP_CSRCS += stm32_rtc.c
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ifeq ($(CONFIG_RTC_ALARM),y)
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CHIP_CSRCS += stm32_exti_alarm.c
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endif
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ifeq ($(CONFIG_RTC_PERIODIC),y)
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CHIP_CSRCS += stm32_exti_wakeup.c
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endif
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ifeq ($(CONFIG_RTC_DRIVER),y)
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CHIP_CSRCS += stm32_rtc_lowerhalf.c
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endif
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endif
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ifeq ($(CONFIG_STM32_ADC),y)
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CHIP_CSRCS += stm32_adc.c
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endif
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ifeq ($(CONFIG_STM32_SDADC),y)
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CHIP_CSRCS += stm32_sdadc.c
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endif
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ifeq ($(CONFIG_STM32_DAC),y)
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CHIP_CSRCS += stm32_dac.c
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endif
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ifeq ($(CONFIG_STM32_COMP),y)
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CHIP_CSRCS += stm32_comp.c
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endif
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ifeq ($(CONFIG_STM32_OPAMP),y)
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CHIP_CSRCS += stm32_opamp.c
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endif
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ifeq ($(CONFIG_STM32_HRTIM),y)
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CHIP_CSRCS += stm32_hrtim.c
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endif
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ifeq ($(CONFIG_STM32_1WIREDRIVER),y)
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CHIP_CSRCS += stm32_1wire.c
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endif
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ifeq ($(CONFIG_STM32_HCIUART),y)
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CHIP_CSRCS += stm32_hciuart.c
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endif
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ifeq ($(CONFIG_STM32_RNG),y)
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CHIP_CSRCS += stm32_rng.c
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endif
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ifeq ($(CONFIG_STM32_LTDC),y)
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CHIP_CSRCS += stm32_ltdc.c
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endif
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ifeq ($(CONFIG_STM32_DMA2D),y)
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CHIP_CSRCS += stm32_dma2d.c
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endif
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ifeq ($(CONFIG_STM32_PWM),y)
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CHIP_CSRCS += stm32_pwm.c
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endif
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ifeq ($(CONFIG_SENSORS_QENCODER),y)
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CHIP_CSRCS += stm32_qencoder.c
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endif
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ifeq ($(CONFIG_STM32_CAN),y)
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CHIP_CSRCS += stm32_can.c
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endif
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ifeq ($(CONFIG_STM32_IWDG),y)
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CHIP_CSRCS += stm32_iwdg.c
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endif
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ifeq ($(CONFIG_STM32_WWDG),y)
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CHIP_CSRCS += stm32_wwdg.c
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endif
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ifeq ($(CONFIG_DEBUG_FEATURES),y)
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CHIP_CSRCS += stm32_dumpgpio.c
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endif
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ifeq ($(CONFIG_STM32_AES),y)
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CHIP_CSRCS += stm32_aes.c
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endif
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ifeq ($(CONFIG_STM32_BBSRAM),y)
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CHIP_CSRCS += stm32_bbsram.c
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endif
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ifeq ($(CONFIG_STM32_FMC),y)
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CHIP_CSRCS += stm32_fmc.c
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endif
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ifeq ($(CONFIG_STM32_FSMC),y)
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CHIP_CSRCS += stm32_fsmc.c
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endif
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