217 lines
6.4 KiB
ReStructuredText
217 lines
6.4 KiB
ReStructuredText
============
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Nordic nRF52
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============
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The nRF52 series of chips from Nordic Semiconductor are based around an ARM Cortex-M4 core running
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at 64 MHz and feature Bluetooth Low Energy (BLE) support.
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Memory Map
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==========
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nRF52832
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--------
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============ ============= ======
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Block Name Start Address Length
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============ ============= ======
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FLASH 0x00000000 512K
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RAM 0x20000000 64K
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============ ============= ======
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nRF52840
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--------
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============ ============= ======
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Block Name Start Address Length
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============ ============= ======
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FLASH 0x00000000 1024K
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RAM 0x20000000 256K
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============ ============= ======
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Clock Configuration
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===================
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Clock settings are handled via Kconfig options, which determines whether to start external crystal
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for the HFCLK, whether to start the LFCLK and which oscillator to use.
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System Timer
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============
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The clock used for providing system time can be chosen via Kconfig. You can choose to use ARM SysTick
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or use RTC in tickless mode.
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Regulator Control
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=================
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DC/DC regulator can be made to be enabled at boot via Kconfig.
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Peripheral Support
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==================
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The following list indicates peripherals supported in NuttX:
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========== ======= =====
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Peripheral Support Notes
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========== ======= =====
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GPIO Yes
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GPIOTE Yes
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I2S No
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MWU No
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NFCT No
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PDM No
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PPI Yes
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PWM Yes
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QDEC No
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QSPI Yes
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RADIO Yes Basic
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RNG Yes
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RTC Yes
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SAADC Yes
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SPIM Yes
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SPIS No
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TEMP No
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TIMER Yes
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TWIM Yes
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TWIS No
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UART Yes
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UARTE No
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USBD Yes
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WDT Yes
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========== ======= =====
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Peripherals such as AAR, ACL, CCM, ECB are not directly used by NuttX since they
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are part of BLE controller implementation (link).
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GPIO/GPIOTE
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-----------
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Pins can be configured/operated using ``nrf52_gpio_*`` functions. Interrupts are
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handled via the GPIOTE peripheral in one of two ways: via a GPIOTE channel or via
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PORT events. The former allows for simultaneous rising/falling edge-sensitive interrupts
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per-pin. However, as there are a limited number of channels (and sometimes these
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are used by some drivers for specific tasks), it may not always be possible to use
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this mechanism. The latter approach for pin interrupts is via the PORT event, determined
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by pin state on a their corresponding GPIO port. This is related to the SENSE capability
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of pins, which can only be set to either rising or falling edge sensing.
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Depending on ``CONFIG_NRF52_PER_PIN_INTERRUPTS`` option, you can set a callback for
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the PORT event itself or you can set a callback for a given pin. In the latter case
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the driver scans for pins with DETECT bit high and calls the configured callback
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automatically.
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Finally, GPIOTE can also be used to configure a channel in *task mode*, which allows to
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control pin state via tasks/events.
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ADC
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---
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The SAADC peripheral is exposed via standard ADC driver. The lower-half of this driver
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is initialized by calling :c:func:`nrf52_adcinitialize`.
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I2C
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---
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I2C is supported both in polling and interrupt mode (via EasyDMA).
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.. note:: The I2C peripheral does not support sending two transfers without sending
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a START nor RSTART. For this reason, this is supported via an internal buffer where
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messages will be first copied to and sent together.
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The lower-half of I2C bus is initialized by :c:func:`nrf52_i2cbus_initialize`.
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There's also a software (bitbang) I2C implementation for nRF52. The lower-half is
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initialized via :c:func:`nrf52_i2c_bitbang_initialize`.
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SPI
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---
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SPI is supported both in polling and interrupt-based (via EasyDMA) mode. The latter
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supports arbitrarily long transfers using Nordic's list-mode EasyDMA (intermediate
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transfers are currently still manually started).
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It is possible to use SPI without either MOSI/MISO pin defined by simply not providing
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the relevant ``BOARD_SPI*_MISO/MOSI_PIN`` definition.
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This implementation support power management hooks, which will disable SPI peripheral when
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entering either SLEEP or STANDBY modes and reconfigure it when going back to NORMAL mode.
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UART
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----
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UART is implemented using polling. UARTE EasyDMA feature is not yet supported.
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This may introduce a large number of interrupts which may be undesirable.
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PPI
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---
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The PPI peripheral is supported via a specific API which lets you control the EVENT
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and TASKs to trigger, both for individual and grouped channels.
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When using channels, you should consider that some peripherals may use PPI internally
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and some may be unavailable for further use. As a helper, if debug assertions are
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enabled, calls to PPI API will check for a channel to actually be disabled when being
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enabled and viceversa. This may help catch collisions in PPI use.
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PWM
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---
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PWM is supported via standard driver. This means that more advanced features such as
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complex sequences or waveform modes are not yet supported.
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QSPI
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----
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QSPI is supported both in interrupt-based (via EasyDMA) mode and is exposed
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via standard QSPI interface.
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RNG
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---
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The RNG peripheral will be used to register a random/urandom device automatically, when
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enabled.
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TIMER
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-----
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The TIMER peripheral is exposed as standard timer.
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RTC
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---
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The RTC peripheral is exposed as a standard timer, since it is really a low-power
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timer, without any date handling capabilities.
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USBD
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----
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The USBD peripheral is exposed via standard USBDEV interface.
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WDT
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---
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The watchdog is supported via low-level API interface and also via standard watchdog
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driver. The driver is written so as to handle an already running watchdog, which may
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have been set by a bootloader.
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BLE Support
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===========
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BLE is supported in nRF52 using Nordic's `SoftDevice Controller <https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrfxlib/softdevice_controller/README.html>`_, using HCI interface. To enable BLE support
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you need to call :c:func:`nrf52_sdc_initialize` on boot, which will initialize the BLE controller.
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SDC support involves registering various high-priority zero-latency interrupts and thus requires
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enabling BASEPRI and high-priority interrupt support. On supported boards, a sample ``sdc`` configuration
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is provided with settings already set.
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Note that in this case, some peripherals (mostly those related to BLE) will be unavailable. Some PPI
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channels will also be ocuppied (``NRF52_PPI_NUM_CONFIGURABLE_CHANNELS`` will be set accordingly in this case).
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Supported Boards
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================
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.. toctree::
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:glob:
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:maxdepth: 1
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boards/*/*
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