nuttx/arch/arm/src/armv7-a
2016-03-29 11:47:35 -06:00
..
addrenv.h Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
arm_addrenv_kstack.c
arm_addrenv_shm.c Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section() 2016-02-13 19:11:09 -06:00
arm_addrenv_ustack.c
arm_addrenv_utils.c Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section() 2016-02-13 19:11:09 -06:00
arm_addrenv.c Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section() 2016-02-13 19:11:09 -06:00
arm_allocpage.c Make some spacing comply better with coding standard 2015-10-06 16:23:32 -06:00
arm_assert.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_blocktask.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_checkmapping.c
arm_coherent_dcache.c ARMv7-A: Cosmetic changes 2015-12-14 08:42:39 -06:00
arm_copyarmstate.c ARMv7-A/M: Cosmetic changes 2015-12-14 11:56:39 -06:00
arm_copyfullstate.c
arm_cpuindex.c ARM: Remove some obsolete and incorrect conditional compilation 2016-03-11 12:42:58 -06:00
arm_cpupause.c Conform to revised SMP interfaces. Improve i.MX6 SMP startup handshake. 2016-03-12 15:22:45 -06:00
arm_cpustart.c Conform to revised SMP interfaces. Improve i.MX6 SMP startup handshake. 2016-03-12 15:22:45 -06:00
arm_dataabort.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_doirq.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_elf.c Make some spacing comply better with coding standard 2015-10-06 16:23:32 -06:00
arm_fpuconfig.S Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
arm_fullcontextrestore.S Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
arm_gicv2.c Make it clear that GIC support is GICv2 2016-03-14 10:50:54 -06:00
arm_head.S TMS570 is big-endian 2015-12-26 14:47:54 -06:00
arm_initialstate.c
arm_l2cc_pl310.c Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section() 2016-02-13 19:11:09 -06:00
arm_memcpy.S ARMv7-R: fix some issues to get a clean compilation; TMS570: Add enough logic to support a minimum build. Not much there on the initial commit 2015-12-16 09:03:14 -06:00
arm_mmu.c Make some spacing comply better with coding standard 2015-10-06 16:23:32 -06:00
arm_pgalloc.c Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section() 2016-02-13 19:11:09 -06:00
arm_pghead.S ARMv7-A: Cosmetic changes 2015-12-14 08:42:39 -06:00
arm_pginitialize.c
arm_physpgaddr.c
arm_prefetchabort.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_releasepending.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_reprioritizertr.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_restorefpu.S Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
arm_savefpu.S Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
arm_saveusercontext.S Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
arm_schedulesigaction.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_sigdeliver.c Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
arm_signal_dispatch.c
arm_syscall.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_testset.S Add spinlock support for ARMv7-M architectures 2016-02-09 13:44:22 -06:00
arm_unblocktask.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_undefinedinsn.c Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
arm_va2pte.c Make some spacing comply better with coding standard 2015-10-06 16:23:32 -06:00
arm_vectoraddrexcptn.S Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
arm_vectors.S TMS570: Add a little more IRQ/FIQ logic 2015-12-21 10:57:01 -06:00
arm_vectortab.S Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
arm_vfork.S
arm_virtpgaddr.c Costmetic fixes to C coding style 2015-10-05 17:13:53 -06:00
arm.h ARMv7-A: Add GIC register definition header file 2016-02-29 18:13:51 -06:00
cache.h Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section() 2016-02-13 19:11:09 -06:00
cp15_cacheops.h Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
cp15_clean_dcache.S ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
cp15_coherent_dcache.S ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
cp15_flush_dcache.S ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
cp15_invalidate_dcache_all.S Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
cp15_invalidate_dcache.S ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
cp15.h ARMv7-A: Update some co-processor register naming 2015-12-14 13:04:03 -06:00
crt0.c
fpu.h Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
gic.h Make it clear that GIC support is GICv2 2016-03-14 10:50:54 -06:00
gtm.h i.MX6: Add incomplete GPT header file 2016-03-09 09:08:01 -06:00
Kconfig Make it clear that GIC support is GICv2 2016-03-14 10:50:54 -06:00
l2cc_pl310.h
l2cc.h ARMv7-A: Cosmetic changes 2015-12-14 08:42:39 -06:00
mmu.h ARMv7-A: Cosmetic changes 2015-12-14 08:42:39 -06:00
mpcore.h MPCore: Fix missing header file inclusion; Add GIC-based implementations of up_enabable_irq(0 and up_disable_irq() 2016-03-10 08:37:34 -06:00
pgalloc.h
sctlr.h Update some ARM registers for Cortex-A9 2016-03-29 11:47:35 -06:00
svcall.h ARMv7-A/M: Cosmetic changes 2015-12-14 11:56:39 -06:00
Toolchain.defs WINTOOl should be selected only for Cygwin. MSYS and native should not have it. 2016-01-09 16:34:33 -06:00