1956385a7d
Provide a way to only customize specific string operations, such as for memcpy with the DMA capability by ROM. Signed-off-by: yangdongdong <yangdongdong@xiaomi.com>
249 lines
6.3 KiB
ArmAsm
249 lines
6.3 KiB
ArmAsm
/****************************************************************************
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* libs/libc/machine/xtensa/arch_strcpy.S
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include "xtensa_asm.h"
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#include <arch/chip/core-isa.h>
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#include <arch/xtensa/xtensa_abi.h>
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#include "libc.h"
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#ifdef LIBC_BUILD_STRCPY
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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.section .text
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.begin schedule
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.align 4
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.literal_position
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.global strcpy
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.type strcpy, @function
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strcpy:
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ENTRY(16)
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/* a2 = dst, a3 = src */
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mov a10, a2 # leave dst in return value register
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movi a4, MASK0
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movi a5, MASK1
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movi a6, MASK2
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movi a7, MASK3
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bbsi.l a3, 0, .Lsrc1mod2
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bbsi.l a3, 1, .Lsrc2mod4
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.Lsrcaligned:
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/* Check if the destination is aligned. */
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movi a8, 3
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bnone a10, a8, .Laligned
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j .Ldstunaligned
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.Lsrc1mod2: # src address is odd
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l8ui a8, a3, 0 # get byte 0
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addi a3, a3, 1 # advance src pointer
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s8i a8, a10, 0 # store byte 0
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beqz a8, 1f # if byte 0 is zero
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addi a10, a10, 1 # advance dst pointer
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bbci.l a3, 1, .Lsrcaligned # if src is now word-aligned
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.Lsrc2mod4: # src address is 2 mod 4
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l8ui a8, a3, 0 # get byte 0
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/* 1-cycle interlock */
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s8i a8, a10, 0 # store byte 0
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beqz a8, 1f # if byte 0 is zero
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l8ui a8, a3, 1 # get byte 0
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addi a3, a3, 2 # advance src pointer
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s8i a8, a10, 1 # store byte 0
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addi a10, a10, 2 # advance dst pointer
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bnez a8, .Lsrcaligned
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1: RET(16)
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/* dst is word-aligned; src is word-aligned. */
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.align 4
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#if XCHAL_HAVE_LOOPS
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#if XCHAL_HAVE_DENSITY
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/* (2 mod 4) alignment for loop instruction */
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#else
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/* (1 mod 4) alignment for loop instruction */
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.byte 0
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.byte 0
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#endif
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.Laligned:
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#if XCHAL_HAVE_DENSITY
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_movi.n a8, 0 # set up for the maximum loop count
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#else
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_movi a8, 0 # set up for the maximum loop count
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#endif
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loop a8, .Lz3 # loop forever (almost anyway)
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l32i a8, a3, 0 # get word from src
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addi a3, a3, 4 # advance src pointer
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bnone a8, a4, .Lz0 # if byte 0 is zero
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bnone a8, a5, .Lz1 # if byte 1 is zero
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bnone a8, a6, .Lz2 # if byte 2 is zero
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s32i a8, a10, 0 # store word to dst
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bnone a8, a7, .Lz3 # if byte 3 is zero
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addi a10, a10, 4 # advance dst pointer
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#else /* !XCHAL_HAVE_LOOPS */
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1: addi a10, a10, 4 # advance dst pointer
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.Laligned:
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l32i a8, a3, 0 # get word from src
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addi a3, a3, 4 # advance src pointer
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bnone a8, a4, .Lz0 # if byte 0 is zero
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bnone a8, a5, .Lz1 # if byte 1 is zero
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bnone a8, a6, .Lz2 # if byte 2 is zero
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s32i a8, a10, 0 # store word to dst
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bany a8, a7, 1b # if byte 3 is zero
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#endif /* !XCHAL_HAVE_LOOPS */
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.Lz3: /* Byte 3 is zero. */
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RET(16)
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.Lz0: /* Byte 0 is zero. */
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#if XCHAL_HAVE_BE
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movi a8, 0
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#endif
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s8i a8, a10, 0
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RET(16)
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.Lz1: /* Byte 1 is zero. */
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#if XCHAL_HAVE_BE
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extui a8, a8, 16, 16
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#endif
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s16i a8, a10, 0
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RET(16)
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.Lz2: /* Byte 2 is zero. */
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#if XCHAL_HAVE_BE
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extui a8, a8, 16, 16
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#endif
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s16i a8, a10, 0
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movi a8, 0
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s8i a8, a10, 2
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RET(16)
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#if 1
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/* For now just use byte copy loop for the unaligned destination case. */
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.align 4
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#if XCHAL_HAVE_LOOPS
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#if XCHAL_HAVE_DENSITY
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/* (2 mod 4) alignment for loop instruction */
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#else
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/* (1 mod 4) alignment for loop instruction */
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.byte 0
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.byte 0
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#endif
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#endif
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.Ldstunaligned:
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#if XCHAL_HAVE_LOOPS
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#if XCHAL_HAVE_DENSITY
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_movi.n a8, 0 # set up for the maximum loop count
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#else
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_movi a8, 0 # set up for the maximum loop count
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#endif
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loop a8, 2f # loop forever (almost anyway)
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#endif
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1: l8ui a8, a3, 0
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addi a3, a3, 1
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s8i a8, a10, 0
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addi a10, a10, 1
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#if XCHAL_HAVE_LOOPS
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beqz a8, 2f
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#else
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bnez a8, 1b
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#endif
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2: RET(16)
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#else /* 0 */
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/* This code is not functional yet. */
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.Ldstunaligned:
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l32i a9, a2, 0 # load word from dst
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#if XCHAL_HAVE_BE
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ssa8b a9 # rotate by dst alignment so that
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src a9, a9, a9 # shift in loop will put back in place
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ssa8l a9 # shift left by byte*8
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#else
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ssa8l a9 # rotate by dst alignment so that
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src a9, a9, a9 # shift in loop will put back in place
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ssa8b a9 # shift left by 32-byte*8
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#endif
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/* dst is word-aligned; src is unaligned. */
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.Ldstunalignedloop:
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l32i a8, a3, 0 # get word from src
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/* 1-cycle interlock */
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bnone a8, a4, .Lu0 # if byte 0 is zero
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bnone a8, a5, .Lu1 # if byte 1 is zero
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bnone a8, a6, .Lu2 # if byte 2 is zero
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src a9, a8, a9 # combine last word and this word
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s32i a9, a10, 0 # store word to dst
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bnone a8, a7, .Lu3 # if byte 3 is nonzero, iterate
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l32i a9, a3, 4 # get word from src
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addi a3, a3, 8 # advance src pointer
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bnone a9, a4, .Lu4 # if byte 0 is zero
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bnone a9, a5, .Lu5 # if byte 1 is zero
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bnone a9, a6, .Lu6 # if byte 2 is zero
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src a8, a9, a8 # combine last word and this word
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s32i a8, a10, 4 # store word to dst
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addi a10, a10, 8 # advance dst pointer
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bany a8, a7, .Ldstunalignedloop # if byte 3 is nonzero, iterate
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/* Byte 7 is zero. */
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.Lu7: RET(16)
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.Lu0: /* Byte 0 is zero. */
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#if XCHAL_HAVE_BE
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movi a8, 0
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#endif
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s8i a8, a10, 0
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RET(16)
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.Lu1: /* Byte 1 is zero. */
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#if XCHAL_HAVE_BE
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extui a8, a8, 16, 16
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#endif
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s16i a8, a10, 0
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RET(16)
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.Lu2: /* Byte 2 is zero. */
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s16i a8, a10, 0
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movi a8, 0
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s8i a8, a10, 2
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RET(16)
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#endif /* 0 */
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.end schedule
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.size strcpy, . - strcpy
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#endif
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