484 lines
14 KiB
C
484 lines
14 KiB
C
/****************************************************************************
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* arch/arm/src/m9s12/m9s12_gpio.c
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* arch/arm/src/chip/m9s12_gpio.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <assert.h>
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#include <errno.h>
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#include <nuttx/arch.h>
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#include "up_arch.h"
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#include "m9s12_internal.h"
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#include "m9s12_pim.h"
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#include "m9s12_mebi.h"
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* GPIO management macros:
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*
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* The GPIO configuration is represented by a 16-bit value encoded as follows:
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*
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* xIIO UURV DMGG GPPP
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* ||| |||| ||| `-Pin number
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* ||| |||| || `- Port number
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* ||| |||| | `- PIM Ports
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* ||| |||| `- Direction
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* ||| |||`- Initial value of output
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* ||| ||`- Reduced drive
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* ||| |`- Polarity
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* ||| `- Pull up (or down)
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* ||`- Wired OR open drain
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* |`- Interrupt or rising/falling (polarity)
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* `- Interrupt
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*
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* NOTE: MEBI ports E and K can have special configurations as controlled by
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* the PEAR and MODE registers. Those special configurations are not managed
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* by the logic below; that logic is only intended to support general GPIO
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* pin usage.
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*/
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/* PIM ports (T,S,G,H,J,L) */
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#define HCS12_PIM_NPORTS 6
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/* MEBI ports (A,B,E,K) */
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#define HCS12_MEBI_NPORTS 4
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/* Which ports have which registers? */
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#define HCS12_PORT_T (1 << 0)
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#define HCS12_PORT_S (1 << 1)
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#define HCS12_PORT_G (1 << 2)
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#define HCS12_PORT_H (1 << 3)
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#define HCS12_PORT_J (1 << 4)
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#define HCS12_PORT_L (1 << 5)
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#define HCS12_PORT_ALL 0x3f
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#define HCS12_IO_PORTS HCS12_PORT_ALL
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#define HCS12_INPUT_PORTS HCS12_PORT_ALL
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#define HCS12_DDR_PORTS HCS12_PORT_ALL
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#define HCS12_RDR_PORTS HCS12_PORT_ALL
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#define HCS12_PER_PORTS HCS12_PORT_ALL
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#define HCS12_PS_PORTS HCS12_PORT_ALL
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#define HCS12_WOM_PORTS (HCS12_PORT_S|HCS12_PORT_L)
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#define HCS12_IE_PORTS (HCS12_PORT_G|HCS12_PORT_H|HCS12_PORT_J)
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#define HCS12_IF_PORTS (HCS12_PORT_G|HCS12_PORT_H|HCS12_PORT_J)
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/* Decoding helper macros */
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#define HCS12_PIN(cfg) (((cfg) & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT)
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#define HCS12_PORTNDX(cfg) (((cfg) >> GPIO_PORT_SHIFT) & 7)
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#define HCS12_PIMPORT(cfg) (((cfg) & GPIO_PORT_PIM) != 0)
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#define HCS12_MEBIPORT(cfg) (((cfg) & GPIO_PORT_PIM) == 0)
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#define HCS12_OUTPUT(cfg) (((cfg) & GPIO_DIRECTION) == GPIO_OUTPUT)
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#define HCS12_PULL(cfg) (((cfg) & GPIO_PULLUP_MASK) >> GPIO_PULLUP_SHIFT)
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# define HCS12_PULL_NONE 0
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# define HCS12_PULL_POLARITY 1
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# define HCS12_PULL_ENABLE 2
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# define HCS12_PULL_UP 2
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# define HCS12_PULL_DOWN 3
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#define HCS12_INTERRUPT(cfg) (((cfg) & GPIO_INT_MASK) >> GPIO_INT_SHIFT)
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# define HCS12_INT_NONE 0
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# define HCS12_INT_POLARITY 1
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# define HCS12_INT_ENABLE 2
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# define HCS12_INT_FALLING 2
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# define HCS12_INT_RISING 3
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct mebi_portaddr_s
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{
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uint16_t data; /* Data register */
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uint16_t ddr; /* Direction register */
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};
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct mebi_portaddr_s mebi_portaddr[HCS12_MEBI_NPORTS] =
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{
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{HCS12_MEBI_PORTA, HCS12_MEBI_DDRA}, /* Port A */
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{HCS12_MEBI_PORTB, HCS12_MEBI_DDRB}, /* Port B */
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{HCS12_MEBI_PORTE, HCS12_MEBI_DDRE}, /* Port E */
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{HCS12_MEBI_PORTK, HCS12_MEBI_DDRK} /* Port K */
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};
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static uint8_t mebi_bits[HCS12_MEBI_NPORTS] =
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{
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(1 << 0), (1 << 1), (1 << 4), (1 << 7)
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Misc. Low-Level, Inline Helper Functions
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****************************************************************************/
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/* Set or clear a bit in a register */
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static inline void gpio_writebit(uint16_t regaddr, uint8_t pin, bool set)
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{
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uint8_t regval = getreg8(regaddr);
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if (set)
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{
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regval |= (1 << pin);
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}
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else
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{
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regval &= ~(1 << pin);
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}
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putreg8(regval, regaddr);
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}
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/* Return the value of a bit in a register */
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static inline bool gpio_readbit(uint16_t regaddr, uint8_t pin)
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{
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uint8_t regval = getreg8(regaddr);
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return ((regval & (1 << pin)) != 0);
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}
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/* Set the direction of a PIM port */
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static inline void pim_direction(uint8_t portndx, uint8_t pin, bool output)
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{
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gpio_writebit(HCS12_PIM_PORT_DDR(portndx), pin, output);
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}
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/* Set the direction of a MEBI port */
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static inline void mebi_direction(uint8_t portndx, uint8_t pin, bool output)
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{
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gpio_writebit(mebi_portaddr[portndx].ddr, pin, output);
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}
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/* Write to the Wired-OR register of a PIM port */
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static inline void pim_opendrain(uint8_t portndx, uint8_t pin, bool opendrain)
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{
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DEBUGASSERT(!opendrain || (HCS12_WOM_PORTS & (1 << pin)) != 0);
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gpio_writebit(HCS12_PIM_PORT_WOM(portndx), pin, opendrain);
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}
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/* Configure pull up resisters on on a PIM port pin */
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static inline void pim_pullpin(uint8_t portndx, uint8_t pin, uint8_t pull)
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{
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bool enable = false;
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bool polarity = false;
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if ((pull & HCS12_PULL_ENABLE) != 0)
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{
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enable = true;
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if ((pull & HCS12_PULL_POLARITY) != 0)
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{
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polarity = true;
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}
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}
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gpio_writebit(HCS12_PIM_PORT_PER(portndx), pin, enable);
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gpio_writebit(HCS12_PIM_PORT_PS(portndx), pin, polarity);
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}
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/* Configure pull up resisters on on a while PIM port */
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static inline void mebi_pullport(uint8_t portndx, uint8_t pull)
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{
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uint8_t regval = getreg8(HCS12_MEBI_PUCR);
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if (pull == HCS12_PULL_UP)
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{
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regval |= mebi_bits[portndx];
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}
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else
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{
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regval &= ~mebi_bits[portndx];
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}
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putreg8(regval, HCS12_MEBI_PUCR);
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}
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/* Select/deselect reduced drive for a PIM port pin */
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static inline void pim_rdpin(uint8_t portndx, uint8_t pin, bool rdenable)
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{
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gpio_writebit(HCS12_PIM_PORT_RDR(portndx), pin, rdenable);
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}
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/* Select/deselect reduced drive for a whole MEBI port */
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static inline void mebi_rdport(uint8_t portndx, bool rdenable)
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{
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uint8_t regval = getreg8(HCS12_MEBI_RDRIV);
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if (rdenable)
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{
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regval |= mebi_bits[portndx];
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}
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else
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{
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regval &= ~mebi_bits[portndx];
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}
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putreg8(regval, HCS12_MEBI_RDRIV);
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}
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/* Configure the PIM port pin as a interrupt */
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static inline void pim_interrupt(uint8_t portndx, unsigned pin, uint8_t type)
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{
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if (type != HCS12_INT_NONE)
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{
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DEBUGASSERT((HCS12_IE_PORTS & (1 << pin)) != 0);
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gpio_writebit(HCS12_PIM_PORT_IE(portndx), pin, false);
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gpio_writebit(HCS12_PIM_PORT_PS(portndx), pin, ((type & GPIO_INT_POLARITY) != 0));
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}
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else if ((HCS12_IE_PORTS & (1 << pin)) != 0)
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{
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gpio_writebit(HCS12_PIM_PORT_IE(portndx), pin, false);
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}
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}
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/****************************************************************************
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* Name: pim_configgpio
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*
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* Description:
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* Configure a PIM pin based on bit-encoded description of the pin.
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*
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****************************************************************************/
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static inline void pim_configgpio(uint16_t cfgset, uint8_t portndx, uint8_t pin)
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{
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/* Sanity checking -- Check if the pin will be enabled as an interrupt
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* (later)
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*/
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DEBUGASSERT(portndx < HCS12_PIM_NPORTS);
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#ifdef CONFIG_DEBUG
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if ((cfgset & GPIO_INT_ENABLE) != 0)
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{
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/* Yes.. then it must not be tagged as an output */
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ASSERT((cfgset & GPIO_DIRECTION) != GPIO_OUTPUT);
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/* If the pull-driver is also enabled, it must be enabled with a
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* compatible priority.
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*/
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if ((cfgset & GPIO_PULL_ENABLE) != 0)
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{
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if ((cfgset & GPIO_INT_POLARITY) != 0)
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{
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ASSERT((cfgset & GPIO_PULL_POLARITY) != 0);
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}
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else
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{
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ASSERT((cfgset & GPIO_PULL_POLARITY) == 0);
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}
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}
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}
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#endif
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pim_direction(portndx, pin, ((cfgset & GPIO_DIRECTION) == GPIO_OUTPUT));
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pim_opendrain(portndx, pin, ((cfgset & GPIO_OPENDRAIN) != 0));
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pim_pullpin(portndx, pin, HCS12_PULL(cfgset));
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pim_rdpin(portndx, pin, ((cfgset & GPIO_REDUCED) != 0));
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pim_interrupt(portndx, pin, HCS12_INTERRUPT(cfgset));
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}
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/****************************************************************************
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* Name: mebi_configgpio
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*
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* Description:
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* Configure a MEBI pin based on bit-encoded description of the pin.
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*
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****************************************************************************/
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static inline void mebi_configgpio(uint16_t cfgset, uint8_t portndx, uint8_t pin)
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{
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DEBUGASSERT(portndx < HCS12_MEBI_NPORTS);
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mebi_direction(portndx, pin, ((cfgset & GPIO_DIRECTION) == GPIO_OUTPUT));
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mebi_pullport(portndx, HCS12_PULL(cfgset));
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mebi_rdport(portndx, ((cfgset & GPIO_REDUCED) != 0));
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}
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/****************************************************************************
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* Read/Write Helpers
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****************************************************************************/
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/* Set the output state of a PIM port pin */
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static inline void pim_gpiowrite(uint8_t portndx, uint8_t pin, bool value)
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{
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uint16_t regaddr = HCS12_PIM_PORT_IO(portndx);
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DEBUGASSERT(portndx < HCS12_PIM_NPORTS);
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gpio_writebit(regaddr, pin, value);
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}
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/* Set the output state of a MEBI port pin */
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static inline void mebi_gpiowrite(uint8_t portndx, uint8_t pin, bool value)
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{
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uint16_t regaddr;
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DEBUGASSERT(portndx < HCS12_MEBI_NPORTS);
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regaddr = mebi_portaddr[portndx].data;
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gpio_writebit(regaddr, pin, value);
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}
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/* Get the current state of a PIM port pin */
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static inline bool pim_gpioread(uint8_t portndx, uint8_t pin)
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{
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uint16_t regaddr = HCS12_PIM_PORT_INPUT(portndx);
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DEBUGASSERT(portndx < HCS12_PIM_NPORTS);
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return gpio_readbit(regaddr, pin);
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}
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/* Get the current state of a MEBI port pin */
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static inline bool mebi_gpioread(uint8_t portndx, uint8_t pin)
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{
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uint16_t regaddr;
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DEBUGASSERT(portndx < HCS12_MEBI_NPORTS);
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regaddr = mebi_portaddr[portndx].data;
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return gpio_readbit(regaddr, pin);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: hcs12_configgpio
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*
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* Description:
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* Configure a GPIO pin based on bit-encoded description of the pin.
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*
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****************************************************************************/
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int hcs12_configgpio(uint16_t cfgset)
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{
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/* Get the port index and pin number */
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uint8_t portndx = HCS12_PORTNDX(cfgset);
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uint8_t pin = HCS12_PIN(cfgset);
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/* Configure the pin */
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if (HCS12_PIMPORT(cfgset))
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{
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pim_configgpio(cfgset, portndx, pin);
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}
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else
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{
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mebi_configgpio(cfgset, portndx, pin);
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}
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/* If the pin is an output, then set the initial value of the output */
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if (HCS12_OUTPUT(cfgset))
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{
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hcs12_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_VALUE) == GPIO_OUTPUT_HIGH);
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}
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return OK;
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}
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/****************************************************************************
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* Name: hcs12_gpiowrite
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*
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* Description:
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* Write one or zero to the selected GPIO pin
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*
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****************************************************************************/
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void hcs12_gpiowrite(uint16_t pinset, bool value)
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{
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uint8_t portndx = HCS12_PORTNDX(pinset);
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uint8_t pin = HCS12_PIN(pinset);
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irqstate_t flags = irqsave();
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DEBUGASSERT((pinset & GPIO_DIRECTION) == GPIO_OUTPUT);
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if (HCS12_PIMPORT(pinset))
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{
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pim_gpiowrite(portndx, pin, value);
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}
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else
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{
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mebi_gpiowrite(portndx, pin, value);
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}
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irqrestore(flags);
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}
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/****************************************************************************
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* Name: hcs12_gpioread
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*
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* Description:
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* Read one or zero from the selected GPIO pin
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*
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****************************************************************************/
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bool hcs12_gpioread(uint16_t pinset)
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{
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uint8_t portndx = HCS12_PORTNDX(pinset);
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uint8_t pin = HCS12_PIN(pinset);
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if (HCS12_PIMPORT(pinset))
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{
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return pim_gpioread(portndx, pin);
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}
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else
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{
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return mebi_gpioread(portndx, pin);
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}
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}
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