nuttx/arch/x86/include
2016-08-06 18:16:31 -06:00
..
i486 Update some header commments 2016-08-06 18:16:31 -06:00
qemu Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
.gitignore Move LPC17xx IOCON register definitions from lpc17_gpio.h to lpc17_iocon.h; fix a few more .gitignore files 2013-04-04 18:12:44 -06:00
arch.h Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
io.h Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
irq.h Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
limits.h Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
README.txt Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
syscall.h Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
types.h Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00

arch/x86/include/README.txt
^^^^^^^^^^^^^^^^^^^^^^^^^^^

This directory holds x86-specific header files.  The top-level header files in
arch/x86/include simply include corresponding header files from lower lower-
level chip-specific and architecture-specific directories.

Architecture-Specific Directories
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

Architecture-specific directories hold common header files for specific x86
architectures.  Separating these header file makes it easy to manage such
things as differences in sizeof(long) on 32- and 64-bit x86 architectures.

i486
  This directory holds definitions appropriate for any instantiation of the
  32-bit i486 architecture.

Chip-Specific directories
^^^^^^^^^^^^^^^^^^^^^^^^^

The same x86 architecture may be realized in different chip implementations.
For SoC chips, in particular, on-chip devices and differing interrupt
structures may require special, chip-specific definitions in these chip-
specific directories.

qemu
  This is the implementation of NuttX on the QEMU x86 simulation.