Gustavo Henrique Nihei 1d15196df7 risc-v/esp32c3: Fix detection of CPU reset by Watchdog Timer ... This commit fixes an issue where some peripheral clocks are being disabled during CPU reset on ESP32-C3. Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>		2022-02-25 22:48:09 +08:00
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include	arch/risc-v: Remove unneeded ISA specifc interface	2022-02-25 20:36:16 +08:00
src	risc-v/esp32c3: Fix detection of CPU reset by Watchdog Timer	2022-02-25 22:48:09 +08:00
Kconfig	risc-v/qemu-rv: Supports SMP up to 8 cores	2022-02-18 13:25:01 +08:00