Xiang Xiao 1e23799455 arch/riscv: Optimize the syscall performance in kernel mode ...

by renaming riscv_dispatch_syscall to sys_callx, so the caller
don't need the immediate step(syscallx->riscv_dispatch_syscall)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

2022-05-01 11:31:01 +03:00

..

bl602

arch: Fix the style found in review

2022-05-01 11:29:44 +03:00

c906

RISC-V: Add implementation for vfork

2022-04-25 15:44:32 +08:00

common

arch/riscv: Optimize the syscall performance in kernel mode

2022-05-01 11:31:01 +03:00

esp32c3

arch: Fix the style found in review

2022-05-01 11:29:44 +03:00

fe310

RISC-V: Add implementation for vfork

2022-04-25 15:44:32 +08:00

k210

RISC-V: Add implementation for vfork

2022-04-25 15:44:32 +08:00

litex

RISC-V: Add implementation for vfork

2022-04-25 15:44:32 +08:00

mpfs

RISC-V: Add crt0 file

2022-04-29 02:02:15 +08:00

opensbi

OpenSBI: Add riscv_hardfp.S to compilation

2022-04-27 23:20:51 +08:00

qemu-rv

RISC-V: Add implementation for vfork

2022-04-25 15:44:32 +08:00

rv32m1

RISC-V: Add implementation for vfork

2022-04-25 15:44:32 +08:00

.gitignore

build: Remve the unnecessary .gitignore

2020-05-23 18:00:40 +01:00

Makefile

RISC-V: Add crt0 file

2022-04-29 02:02:15 +08:00