Xiang Xiao 11705ffc71 Fix nxstyle issue

2020-04-14 13:02:00 -06:00

..

fe310

Run codespell -w with the latest dictonary again

2020-02-23 22:27:46 +01:00

gap8

arch: Fix included directed -> included directly

2020-04-05 22:31:15 +01:00

k210

Run codespell -w with the latest dictonary again

2020-02-23 22:27:46 +01:00

litex

Add support for Litex VexRiscV.

2020-03-21 06:01:56 +00:00

nr5m100

arch: Fix included directed -> included directly

2020-04-05 22:31:15 +01:00

rv32im

Fix nxstyle issue

2020-04-14 13:02:00 -06:00

rv64gc

arch: Fix included directed -> included directly

2020-04-05 22:31:15 +01:00

.gitignore

Remove exra whitespace from files (#189)

2020-01-31 09:24:49 -06:00

arch.h

arch: Fix included directed -> included directly

2020-04-05 22:31:15 +01:00

elf.h

ELF64 support (#220)

2020-02-07 17:10:23 -06:00

inttypes.h

Add architecture-specific inttypes.h

2016-10-27 16:01:38 -04:00

irq.h

arch: Fix included directed -> included directly

2020-04-05 22:31:15 +01:00

limits.h

Squashed commit of the following:

2019-12-31 09:06:20 -06:00

spinlock.h

Fix typos and some incorrect comments

2020-01-20 09:32:36 -03:00

stdarg.h

Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it.

2016-10-16 09:47:07 -06:00

syscall.h

arch: Fix included directed -> included directly

2020-04-05 22:31:15 +01:00

types.h

arch: Fix included directed -> included directly

2020-04-05 22:31:15 +01:00