Inochi Amaoto 3cabc92427 arch/risc-v: add risc-v SSTC extension support ...

SSTC extension allows nuttx to implement S-mode timer directly,
which is useful for starting at S-mode.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>

2024-04-27 22:09:22 -03:00

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bl602

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bl808

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c906

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esp32c3

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esp32c3-legacy

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esp32c6

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esp32h2

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fe310

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hpm6000

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hpm6750

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jh7110

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k210

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k230

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litex

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mpfs

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qemu-rv

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rv32m1

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thead

arch/riscv: add T-HEAD CSR mapping

2024-04-11 22:20:39 +08:00

.gitignore

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arch.h

risc-v/arch.h: revising comments

2024-03-25 20:39:24 +08:00

barriers.h

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csr.h

arch/risc-v: add risc-v SSTC extension support

2024-04-27 22:09:22 -03:00

elf.h

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inttypes.h

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irq.h

arch/risc-v: add support of save/restore vector registers

2024-04-23 16:18:46 -03:00

limits.h

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mode.h

arch/risc-v: add risc-v SSTC extension support

2024-04-27 22:09:22 -03:00

setjmp.h

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spinlock.h

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stdarg.h

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syscall.h

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types.h

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