340 lines
11 KiB
C
340 lines
11 KiB
C
/****************************************************************************
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* boards/arm/xmc4/xmc4700-relax/include/board.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_XMC4_XMC4700_RELAX_INCLUDE_BOARD_H
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#define __BOARDS_ARM_XMC4_XMC4700_RELAX_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <stdbool.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* The maximum frequency for the XMC4700 is 144MHz. */
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#undef BOARD_FCPU_120MHZ
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#define BOARD_FCPU_144MHZ 1
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/* Watchdog clock source selection */
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#define WDT_CLKSRC_FOFI 0 /* fOFI clock */
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#define WDT_CLKSRC_FSTDY 1 /* fSTDY clock */
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#define WDT_CLKSRC_FPLL 2 /* fPLL clock */
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/* External Clock source selection */
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#define EXT_CLKSRC_FSYS 0 /* fSYS clock */
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#define EXT_CLKSRC_FUSB 2 /* fUSB clock divided by ECKDIV */
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#define EXT_CLKSRC_FPLL 3 /* fPLL clock divided by ECKDIV */
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/* Factory Calibration */
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#undef BOARD_FOFI_CALIBRATION /* Enable factory calibration */
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/* On-board crystals */
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#define BOARD_XTAL_FREQUENCY 12000000 /* 12MHz XTAL */
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#define BOARD_RTC_XTAL_FRQUENCY 32769 /* 32.768KHz RTC XTAL */
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/* TODO: enable the RTC osc, use RTC for time/date
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*/
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/* Select the external crystal as the PLL clock source */
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#define BOARD_PLL_CLOCKSRC_XTAL 1 /* PLL Clock source == extnernal crystal */
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#undef BOARD_PLL_CLOCKSRC_OFI /* PLL Clock source != internal fast oscillator */
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/* PLL Configuration:
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*
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* fXTAL = 12Mhz
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* 260 MHz <= fVCO <= 520 MHz
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*
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* fVCO = fXTAL * ndiv / pdiv
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* fPLL = fVCO / k2div
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* fSYS = fPLL / sysdiv
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* fETH = fSYS / 2 (fixed div by 2)
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* fCCU = fSYS / ccudiv (div by 1 or 2)
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* fCPU = fSYS / cpudiv (div by 1 or 2)
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* fPERIPH = fCPU / pbdiv (div by 1 or 2)
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*/
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#define BOARD_ENABLE_PLL 1 /* enable the PLL */
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#define CPU_FREQ 120 /* MHz */
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/* TODO: Automate PLL calculations */
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#if CPU_FREQ == 120
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/* 120 MHz
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*
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* fVCO = 12MHz * 40 / 2 = 480MHz
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* fPLL = 480MHz / 2 = 240MHz
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* fSYS = fPLL / 2 = 120MHz
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* fCCU = fSYS / 2 = 60MHz
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* fCPU = fSYS / 1 = 120MHz
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* fPB = fCPU / 2 = 60MHz
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* fETH = fSYS / 2 = 60MHz
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*/
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# define BOARD_PLL_NDIV 40
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# define BOARD_PLL_PDIV 1
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# define BOARD_PLL_K2DIV 4
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# define BOARD_PLL_SYSDIV 1
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# define BOARD_PLL_CPUDIV 1
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# define BOARD_PLL_PBDIV 2
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# define BOARD_PLL_CCUDIV 2
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# define BOARD_PLL_EBUDIV 4
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#elif CPU_FREQ == 144
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/* 144 MHz
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*
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* fVCO = 12MHz * 36 / 1 = 432MHz
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* fPLL = 432MHz / 3 = 144MHz
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* fSYS = fPLL / 1 = 144MHz
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* fCCU = fSYS / 2 = 72MHz
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* fCPU = fSYS / 1 = 144MHz
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* fPB = fCPU / 2 = 72MHz
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* fETH = fSYS / 2 = 72MHz
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*/
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# define BOARD_PLL_NDIV 36
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# define BOARD_PLL_PDIV 1
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# define BOARD_PLL_K2DIV 3
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# define BOARD_PLL_SYSDIV 1
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# define BOARD_PLL_CPUDIV 1
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# define BOARD_PLL_PBDIV 2
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# define BOARD_PLL_CCUDIV 2
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# define BOARD_PLL_EBUDIV 2
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#else
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# error "Illegal or Unsupported CPU Frequency"
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#endif
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# define BOARD_CCUDIV_ENABLE (BOARD_PLL_CCUDIV - 1)
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# define BOARD_CPUDIV_ENABLE (BOARD_PLL_CPUDIV - 1)
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# define BOARD_VCO_FREQUENCY (BOARD_XTAL_FREQUENCY * BOARD_PLL_NDIV / BOARD_PLL_PDIV)
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# define BOARD_PLL_FREQUENCY (BOARD_VCO_FREQUENCY / BOARD_PLL_K2DIV)
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# define BOARD_SYS_FREQUENCY (BOARD_PLL_FREQUENCY / BOARD_PLL_SYSDIV)
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# define BOARD_CCU_FREQUENCY (BOARD_SYS_FREQUENCY / BOARD_PLL_CCUDIV)
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# define BOARD_CPU_FREQUENCY (BOARD_SYS_FREQUENCY / BOARD_PLL_CPUDIV)
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# define BOARD_PERIPH_FREQUENCY (BOARD_CPU_FREQUENCY / BOARD_PLL_PBDIV)
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# define BOARD_ETH_FREQUENCY (BOARD_SYS_FREQUENCY / 2)
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# define BOARD_WDT_SOURCE WDT_CLKSRC_FOFI
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# define BOARD_WDTDIV 1
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# define BOARD_WDT_FREQUENCY 24000000
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# define BOARD_EXT_SOURCE EXT_CLKSRC_FPLL
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# define BOARD_PLL_ECKDIV 480 /* [1,512] */
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# define kHz_1 1000
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# define MHz_1 (kHz_1 * kHz_1)
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# define MHz_50 ( 50 * MHz_1)
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# define MHz_260 (260 * MHz_1)
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# define MHz_520 (520 * MHz_1)
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/* range check VCO frequency */
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# if (BOARD_VCO_FREQUENCY < MHz_260)
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# error "VCO freq must be >= 260 MHz"
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# endif
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# if (BOARD_VCO_FREQUENCY > MHz_520)
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# error "VCO freq must be <= 520 MHz"
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# endif
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/* range check Ethernet MAC frequency */
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# if (BOARD_ETH_FREQUENCY <= MHz_50)
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# error "ETH freq must be > 50 MHz"
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# endif
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/* check ccudiv cpudiv pbdiv against Table 11-5
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* of XMC4700 User Manual
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*/
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#define CLKDIV_INDEX (4 * (BOARD_PLL_CCUDIV-1) + \
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2 * (BOARD_PLL_CPUDIV-1) + \
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(BOARD_PLL_PBDIV-1) )
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#if (CLKDIV_INDEX == 3) || (CLKDIV_INDEX == 4) || (CLKDIV_INDEX > 6)
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# error "Illegal combination of dividers! Ref: Table 11-5 of UM"
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#endif
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/* EXT clock settings */
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#define BOARD_EXTCKL_ENABLE 1 /* 0 disables output */
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#if BOARD_EXTCKL_ENABLE
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# define EXTCLK_PIN_P0_8 8
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# define EXTCLK_PIN_P1_15 15
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# define BOARD_EXTCLK_PIN EXTCLK_PIN_P0_8
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# define BOARD_EXT_SOURCE EXT_CLKSRC_FPLL
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# define BOARD_EXT_FREQUENCY (250 * kHz_1) /* Desired output freq */
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# define BOARD_EXTDIV (BOARD_PLL_FREQUENCY / BOARD_EXT_FREQUENCY)
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/* range check EXTDIV */
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# if BOARD_EXTDIV > 512
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# error "EXTCLK Divisor out of range!"
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# endif
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#endif
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/* Standby clock source selection
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*
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* BOARD_STDBY_CLOCKSRC_OSI - Internal 32.768KHz slow oscillator
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* BOARD_STDBY_CLOCKSRC_OSCULP - External 32.768KHz crystal
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*/
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#define BOARD_STDBY_CLOCKSRC_OSI 1
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#undef BOARD_STDBY_CLOCKSRC_OSCULP
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#define BOARD_STDBY_FREQUENCY 32768
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/* USB PLL settings.
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*
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* fUSBPLL = 48MHz and fUSBPLLVCO = 384 MHz
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*
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* Note: Implicit divider of 2 and fUSBPLLVCO >= 260 MHz and
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* fUSBPLLVCO <= 520 MHz
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*/
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#undef BOARD_ENABLE_USBPLL
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#define BOARD_USB_PDIV 2
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#define BOARD_USB_NDIV 64
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/* FLASH wait states */
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#define BOARD_FLASH_WS 5
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/* LED definitions **********************************************************/
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/* The XMC4700 Relax board has two LEDs:
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*
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* LED1 P5.9 High output illuminates
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* LED2 P5.8 High output illuminates
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*
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* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
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* any way.
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* The following definitions are used to access individual LEDs.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED0 0
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#define BOARD_LED1 1
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#define BOARD_NLEDS 2
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED0_BIT (1 << BOARD_LED0)
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
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* defined. In that case, the usage by the board port is defined in
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* include/board.h and src/sam_autoleds.c. The LEDs are used to encode
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* OS-related events as follows:
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*
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* SYMBOL Meaning LED state
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* LED2 LED1
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* --------------------- -------------------------- ------ ------
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*/
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#define LED_STARTED 0 /* NuttX has been started OFF OFF */
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#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */
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#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */
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#define LED_STACKCREATED 1 /* Idle stack created ON OFF */
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#define LED_INIRQ 2 /* In an interrupt No change */
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#define LED_SIGNAL 2 /* In a signal handler No change */
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#define LED_ASSERTION 2 /* An assertion failed No change */
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#define LED_PANIC 3 /* The system has crashed N/C Blinking */
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#undef LED_IDLE /* MCU is is sleep mode Not used */
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/* Thus if LED1 is statically on, NuttX has successfully booted and is,
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* apparently, running normally. If LED2 is flashing at approximately
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* 2Hz, then a fatal error has been detected and the system has halted.
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*/
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/* Button definitions *******************************************************/
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/* The XMC4700 Relax board has two buttons:
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*
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* BUTTON1 P15.13 Low input sensed when button pressed
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* BUTTON2 P15.12 Low input sensed when button pressed
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*/
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#define BUTTON_0 0
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#define BUTTON_1 1
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#define NUM_BUTTONS 2
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#define BUTTON_0_BIT (1 << BUTTON_0)
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#define BUTTON_1_BIT (1 << BUTTON_1)
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/* USIC0 ********************************************************************/
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/* USIC0 CH0 is used as UART0
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*
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* RX - P1.4
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* TX - P1.5
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*/
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#define BOARD_UART0_DX USIC_DXB
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#define GPIO_UART0_RXD GPIO_U0C0_DX0B
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#define GPIO_UART0_TXD (GPIO_U0C0_DOUT0_3 | GPIO_PADA1P_STRONGSOFT | GPIO_OUTPUT_SET)
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __BOARDS_ARM_XMC4_XMC4700_RELAX_INCLUDE_BOARD_H */
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