nuttx/boards/risc-v/litex/arty_a7
Xiang Xiao 1f920e55d3 Move warning option from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 15:40:35 +03:00
..
configs/nsh sched: Disable pthread by default when DEFAULT_SMALL is enabled 2022-02-07 12:04:03 +08:00
include
scripts Move warning option from Make.defs to Toolchain.defs 2022-05-15 15:40:35 +03:00
src arch/risc-v: Remove FAR from chip and board folder 2022-04-19 00:22:45 +03:00
Kconfig boards/risc-v/litex/arty_a7: add SDCARD support for the Arty_A7 board 2022-03-30 02:35:27 +08:00
README.txt boards/risc-v/litex/arty_a7: update README to include building in LITESDCARD peripheral 2022-03-30 02:35:27 +08:00

1. Download and install toolchain

  $ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz

2. Follow instruction on https://github.com/enjoy-digital/litex to build the vexriscv softcore fpga gateware
   and flash to arty_a7 board

  $ cd litex-boards/litex_boards/targets
  $ ./digilent_arty.py --with-sdcard --uart-baudrate 1000000 --cpu-type=vexriscv --cpu-variant=secure --build --load --flash

3. Configure and build NuttX

  $ mkdir ./nuttx; cd ./nuttx
  $ git clone https://github.com/apache/incubator-nuttx.git
  $ git clone https://github.com/apache/incubator-nuttx-apps.git
  $ cd nuttx
  $ make distclean
  $ ./tools/configure.sh arty_a7:nsh
  $ make V=1

4. Setup tftp server on your laptop, copy nuttx.bin to your tftpboot directory and change its name to boot.bin

5. Setup the wire connection(uart and tftp) between your board and laptop

6. Run  $ minicom -b 1000000 /dev/ttyUSB1 (the default baudrate on litex vexriscv is 1e6)
   when you see the bios prompt "litex>", type "netboot" and enter soon comes the nsh prompt

7. TODO

  Support GPIO/SPI/I2C/RTC/WDT/PWM
  Support RISC-V User mode