bd895222eb
And SBI ipi support.
Fixup: 4f63ca1418 ("arch/risc-v: unfiy IPI access)
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
41 lines
835 B
Plaintext
41 lines
835 B
Plaintext
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# S-mode requires a Supervisor Binary Interface (SBI) in order to access
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# M-mode ISA. A minimalistic SBI is provided here natively.
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config NUTTSBI
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bool "Use NuttX native SBI"
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default n
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depends on ARCH_RISCV && ARCH_USE_S_MODE
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---help---
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Use NuttX minimalistic SBI
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if NUTTSBI
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config NUTTSBI_HART_CNT
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int "Amount of harts in SoC"
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default 1
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config NUTTSBI_IPI_BASE
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hex "MSWI base address"
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default 0
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---help---
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Sets the address of mtimecmp memory mapped register
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config NUTTSBI_MTIME_BASE
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hex "MTIME base address"
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default 0
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---help---
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Sets the address of mtime memory mapped register
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config NUTTSBI_MTIMECMP_BASE
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hex "MTIMECMP base address"
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default 0
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---help---
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Sets the address of mtimecmp memory mapped register
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config NUTTSBI_LATE_INIT
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bool "Target has sbi_late_init() implementation"
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default n
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endif
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