lipengfei28 519c5c86aa add pci irq interface ... Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>		2024-10-10 15:31:08 +02:00
..
intel64	arch: We can use an independent SIG interrupt to handle async pause, which can save processing time.	2024-10-09 23:32:31 +08:00
.gitignore
acpi.h	arch/x86_64: add simple ACPI parser	2024-04-22 23:47:09 +08:00
arch.h	arch/x86_64: addrenv support	2024-07-03 17:40:53 +08:00
elf.h	arch/x86_64: add basic support for R_X86_64_REX_GOTPCRELX relocation	2024-09-17 03:20:03 +08:00
hpet.h	arch/intel64/hpet: add FSB interrupts support and support for 32-bit mode	2024-09-13 09:28:08 -03:00
inttypes.h
io.h	Indent the include statement by two spaces	2023-05-16 12:34:32 -03:00
irq.h	add pci irq interface	2024-10-10 15:31:08 +02:00
limits.h	Indent the include statement by two spaces	2023-05-16 12:34:32 -03:00
multiboot2.h
spinlock.h	toolchain/ghs: Fix SP_DSB warnings	2024-08-11 14:28:12 -03:00
syscall.h
types.h	Indent the include statement by two spaces	2023-05-16 12:34:32 -03:00