Jari Nippula aeddec2ec5 clear i2c ints before the transfer starts ...

If transfer is restarted in irq handler the interrupts shall be
cleared before the start bit is set in control register. This is
to avoid ints being accidentally cleared before they are handled leading
to timeout error.

2023-03-02 22:25:56 +08:00

..

include

Remove the tail spaces from all files except Documentation

2023-02-26 13:24:24 -08:00

src

clear i2c ints before the transfer starts

2023-03-02 22:25:56 +08:00

Kconfig

risc-v/esp32c6: Add ESP32-C6 basic support

2023-02-10 17:38:41 -03:00