d2d954f691
Summary: Adding virtual evaluate platform FVP. This FVP board configuration will be used to emulate generic ARM64v8-R (Cotex-R82)series hardware platform and provide support for these devices: - GICv3 interrupt controllers for ARMv8-r - PL011 UART controller(FVP) Note: 1. ostest is PASSED at fvp ( single core and SMP) 2. the FVP tools can be download from ARM site, please check FVP board readme.txt TODO: merge PL011 UART driver to common place Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
26 lines
818 B
Plaintext
26 lines
818 B
Plaintext
cluster0.has_aarch64=1
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cluster0.VMSA_supported=0
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cluster0.NUM_CORES=1
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cluster0.gicv3.cpuintf-mmap-access-level=2
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cluster0.gicv3.SRE-enable-action-on-mmap=2
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cluster0.gicv3.SRE-EL2-enable-RAO=1
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cluster0.gicv3.extended-interrupt-range-support=1
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gic_distributor.GICD_CTLR-DS-1-means-secure-only=1
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gic_distributor.has-two-security-states=0
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bp.refcounter.non_arch_start_at_default=1
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bp.pl011_uart0.out_file=-
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bp.pl011_uart0.unbuffered_output=1
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bp.terminal_0.start_telnet=0
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bp.pl011_uart1.out_file=-
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bp.pl011_uart1.unbuffered_output=1
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bp.terminal_1.start_telnet=0
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bp.pl011_uart2.out_file=-
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bp.pl011_uart2.unbuffered_output=1
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bp.terminal_2.start_telnet=0
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bp.pl011_uart3.out_file=-
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bp.pl011_uart3.unbuffered_output=1
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bp.terminal_3.start_telnet=0
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bp.vis.disable_visualisation=1
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bp.vis.rate_limit-enable=0
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cache_state_modelled=0
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