b198c63512
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
80 lines
3.0 KiB
Plaintext
80 lines
3.0 KiB
Plaintext
README for the Espressif ESP32 Ethernet Kit
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==============================================
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The ESP32 is a dual-core system from Espressif with two Harvard
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architecture Xtensa LX6 CPUs. All embedded memory, external memory and
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peripherals are located on the data bus and/or the instruction bus of
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these CPUs. With some minor exceptions, the address mapping of two CPUs
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is symmetric, meaning they use the same addresses to access the same
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memory. Multiple peripherals in the system can access embedded memory via
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DMA.
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The ESP32-Ethernet-Kit is an Ethernet-to-Wi-Fi development board that enables
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Ethernet devices to be interconnected over Wi-Fi. At the same time, to provide
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more flexible power supply options, the ESP32-Ethernet-Kit also supports power
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over Ethernet (PoE).
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Buttons and LEDs
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================
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Buttons
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-------
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There are two buttons labeled Boot and EN. The EN button is not available
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to software. It pulls the chip enable line that doubles as a reset line.
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The BOOT button is connected to IO0. On reset it is used as a strapping
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pin to determine whether the chip boots normally or into the serial
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bootloader. After reset, however, the BOOT button can be used for software
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input.
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LEDs
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----
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There are several on-board LEDs for that indicate the presence of power
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and USB activity. None of these are available for use by software.
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Ethernet
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========
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ESP32 has a 802.11 hardware MAC, so just connects to external PHY chip.
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Due to the limited number of GPIOs in ESP32, it's recommended to use RMII to
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connect to an external PHY chip. Current driver also only supports RMII option.
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The RMII GPIO pins are fixed, but the SMI and functional GPIO pins are optional.
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RMII GPIO pins are as following:
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ESP32 GPIO PHY Chip GPIO
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IO25 <--> RXD[0]
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IO26 <--> RXD[1]
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IO27 <--> CRS_DV
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IO0 <--> REF_CLK
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IO19 <--> TXD[0]
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IO21 <--> TX_EN
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IO22 <--> TXD[1]
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SMI GPIO pins (default option) are as following:
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ESP32 GPIO PHY Chip GPIO
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IO18 <--> MDIO
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IO23 <--> MDC
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Functional GPIO pins(default option) are as following:
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ESP32 GPIO PHY Chip GPIO
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IO5 <--> Reset_N
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Using QEMU:
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==========
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First follow the instructions at https://github.com/espressif/qemu/wiki to build QEMU.
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Enable the ESP32_QEMU_IMAGE config found in "Board Selection -> ESP32 binary image for QEMU".
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Download the bootloader and the partition table from https://github.com/espressif/esp-nuttx-bootloader/releases
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and place them in a directory, say ../esp-bins.
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Build and generate the QEMU image: `make ESPTOOL_BINDIR=../esp-bins`
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A new image "esp32_qemu_image.bin" will be created. It can be run as:
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~/PATH_TO_QEMU/qemu/build/xtensa-softmmu/qemu-system-xtensa -nographic \
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-machine esp32 \
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-drive file=esp32_qemu_image.bin,if=mtd,format=raw
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