210de35cb5
arm: sam & tiva: codestyle fixes
* arm: samd2l2: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: samd5e5: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: samv7: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: tiva: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
122 lines
4.6 KiB
C
122 lines
4.6 KiB
C
/****************************************************************************
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* boards/arm/tiva/ekk-lm3s9b96/include/board.h
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* include/arch/board/board.h
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* Jose Pablo Rojas V. <jrojas@nx-engineering.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_TIVA_EKK_LM3S9B96_INCLUDE_BOARD_H
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#define __BOARDS_ARM_TIVA_EKK_LM3S9B96_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* RCC settings */
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#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL16000KHZ /* 16.000 MHz crystal */
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#define XTAL_FREQUENCY 16000000
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/* Oscillator source is the main oscillator (not internal, internal/4,
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* 30KHz or 30KHz from hibernate module)
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*/
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#define SYSCON_RCC_OSCSRC SYSCON_RCC_OSCSRC_MOSC
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#define SYSCON_RCC2_OSCSRC SYSCON_RCC2_OSCSRC2_MOSC
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#define OSCSRC_FREQUENCY XTAL_FREQUENCY
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/* Use system divider = 4; this corresponds to a system clock frequency
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* of (400 / 2) / 4 = 50MHz
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*/
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#define TIVA_SYSDIV 4
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#define SYSCLK_FREQUENCY 50000000 /* 50MHz */
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/* Peripheral Clock (PCLK)
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*
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* Same frequency as the SYSCLK
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*/
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#define PCLK_FREQUENCY SYSCLK_FREQUENCY
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/* Other RCC settings:
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*
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* - Main and internal oscillators enabled.
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* - PLL and sys dividers not bypassed
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* - PLL not powered down
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* - No auto-clock gating reset
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*/
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#define TIVA_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(TIVA_SYSDIV))
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/* RCC2 settings -- RCC2 not used. Other RCC2 settings
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*
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* - PLL and sys dividers not bypassed.
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* - PLL not powered down
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* - Not using RCC2
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*/
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#define TIVA_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV(TIVA_SYSDIV))
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/* LED definitions **********************************************************/
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/* The EKK-LMS39B96 Eval Kit has only one user LED: Port D, Bit 0.
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* Below is the mapping of this single LED.
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* From this single LED, we can get the following information:
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*
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* OFF Steady: The system has failed to boot to the point of
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* enabling interrupts
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* ON Steady: The systems has enabled interrupts,
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* but none have been received
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* Dull glow: The system is taking interrupts
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* Slow blinking: The system has panicked
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* ON OFF
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*/
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#define LED_STARTED 0 /* OFF OFF */
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#define LED_HEAPALLOCATE 1 /* OFF OFF */
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#define LED_IRQSENABLED 2 /* ON ON */
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#define LED_STACKCREATED 3 /* ON ON */
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#define LED_INIRQ 4 /* ON OFF */
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#define LED_SIGNAL 5 /* ON OFF */
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#define LED_ASSERTION 6 /* ON OFF */
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#define LED_PANIC 7 /* ON OFF */
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#endif /* __BOARDS_ARM_TIVA_EKK_LM3S9B96_INCLUDE_BOARD_H */
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