a559f3495a
The VMSAv8-64 translation system has 4 page table levels in total, ranging from 0-3. The address environment code assumes only 3 levels, from 1-3 but this is wrong; the amount of levels _utilized_ depends on the configured VA size CONFIG_ARM64_VA_BITS. With <= 39 bits 3 levels is enough, while if the va range is larger, the 4th translation table level is taken into use dynamically by shifting the base translation table level. From arm64_mmu.c, where va_bits is the amount of va bits used in address translations: (va_bits <= 21) - base level 3 (22 <= va_bits <= 30) - base level 2 (31 <= va_bits <= 39) - base level 1 (40 <= va_bits <= 48) - base level 0 The base level is what is configured as the page directory root. This also affects the performance of address translations i.e. if the VA range is smaller, address translations are also faster as the page table walk is shorter. |
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a64 | ||
fvp-v8r | ||
goldfish | ||
imx8 | ||
imx9 | ||
qemu | ||
rk3399 | ||
zynq-mpsoc | ||
.gitignore | ||
arch.h | ||
elf.h | ||
inttypes.h | ||
irq.h | ||
limits.h | ||
setjmp.h | ||
spinlock.h | ||
stdarg.h | ||
syscall.h | ||
types.h |