nuttx/arch/arm64/include
Ville Juven a559f3495a arm64_addrenv: Fix the amount of page table levels
The VMSAv8-64 translation system has 4 page table levels in total, ranging
from 0-3. The address environment code assumes only 3 levels, from 1-3 but
this is wrong; the amount of levels _utilized_ depends on the configured
VA size CONFIG_ARM64_VA_BITS. With <= 39 bits 3 levels is enough, while
if the va range is larger, the 4th translation table level is taken into
use dynamically by shifting the base translation table level.

From arm64_mmu.c, where va_bits is the amount of va bits used in address
translations:
(va_bits <= 21)       - base level 3
(22 <= va_bits <= 30) - base level 2
(31 <= va_bits <= 39) - base level 1
(40 <= va_bits <= 48) - base level 0

The base level is what is configured as the page directory root. This also
affects the performance of address translations i.e. if the VA range is
smaller, address translations are also faster as the page table walk is
shorter.
2024-09-21 08:36:23 -03:00
..
a64
fvp-v8r arm64: inline up_cpu_index 2024-06-28 21:29:33 +08:00
goldfish arm64: inline up_cpu_index 2024-06-28 21:29:33 +08:00
imx8 arch/arm64: Change the ARM configuration to ARM64.Add ARM64_NEON configuration 2024-06-20 09:41:28 +08:00
imx9 arch/arm64: Change the ARM configuration to ARM64.Add ARM64_NEON configuration 2024-06-20 09:41:28 +08:00
qemu arm64/qemu_boot: add arm64 pci io memory map 2024-09-10 14:34:31 +08:00
rk3399
zynq-mpsoc arch/arm64: add initial support for ZYNQ MPSOC 2024-07-13 20:51:39 -03:00
.gitignore
arch.h arm64_addrenv: Fix the amount of page table levels 2024-09-21 08:36:23 -03:00
elf.h
inttypes.h
irq.h arch: move up_interrupt_context to arch specific irq.h 2024-09-19 08:30:09 +08:00
limits.h
setjmp.h
spinlock.h nuttx: fix multiple 'FAR', 'CODE' and style issues 2024-08-25 19:22:15 +08:00
stdarg.h
syscall.h arm64: Initial implementation of CONFIG_BUILD_KERNEL 2024-08-23 10:26:34 -03:00
types.h types.h: fix windows build error 2024-08-14 22:36:57 +08:00