1d8e69700f
It uses the memory block as the serial communication medium, which can communicate between different processes or different CPUs Using the following configuration, the cross-core communication rate of 200MHz cortex-M55 is about 461KB/s RAM_UART_BUFSIZE=1024 RAM_UART_POLLING_INTERVAL=100 Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
539 lines
15 KiB
C
539 lines
15 KiB
C
/****************************************************************************
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* drivers/serial/uart_ram.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <assert.h>
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#include <errno.h>
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#include <string.h>
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#include <sys/types.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/serial/serial.h>
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#include <nuttx/serial/uart_ram.h>
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#include <nuttx/wdog.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define UART_RAMBUF_SECTION(n) \
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locate_data(CONFIG_RAM_UART_BUFFER_SECTION "." #n)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct uart_ram_s
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{
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struct uart_dev_s uart;
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struct wdog_s wdog;
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FAR struct uart_rambuf_s *tx;
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FAR struct uart_rambuf_s *rx;
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int uart_ram_setup(FAR struct uart_dev_s *dev);
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static void uart_ram_shutdown(FAR struct uart_dev_s *dev);
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static int uart_ram_attach(FAR struct uart_dev_s *dev);
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static void uart_ram_detach(FAR struct uart_dev_s *dev);
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static int uart_ram_ioctl(FAR struct file *filep, int cmd,
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unsigned long arg);
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static int uart_ram_receive(FAR struct uart_dev_s *dev,
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FAR uint32_t *status);
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static void uart_ram_rxint(FAR struct uart_dev_s *dev, bool enable);
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static bool uart_ram_rxavailable(FAR struct uart_dev_s *dev);
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static void uart_ram_dmasend(FAR struct uart_dev_s *dev);
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static void uart_ram_dmareceive(FAR struct uart_dev_s *dev);
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static void uart_ram_dmarxfree(FAR struct uart_dev_s *dev);
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static void uart_ram_dmatxavail(FAR struct uart_dev_s *dev);
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static void uart_ram_send(FAR struct uart_dev_s *dev, int ch);
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static void uart_ram_txint(FAR struct uart_dev_s *dev, bool enable);
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static bool uart_ram_txready(FAR struct uart_dev_s *dev);
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static bool uart_ram_txempty(FAR struct uart_dev_s *dev);
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static void uart_ram_wdog(wdparm_t arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct uart_ops_s g_uart_ram_ops =
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{
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uart_ram_setup,
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uart_ram_shutdown,
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uart_ram_attach,
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uart_ram_detach,
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uart_ram_ioctl,
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uart_ram_receive,
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uart_ram_rxint,
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uart_ram_rxavailable,
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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NULL,
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#endif
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uart_ram_dmasend,
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uart_ram_dmareceive,
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uart_ram_dmarxfree,
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uart_ram_dmatxavail,
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uart_ram_send,
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uart_ram_txint,
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uart_ram_txready,
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uart_ram_txempty,
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};
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#ifdef CONFIG_RAM_UART0
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static struct uart_rambuf_s UART_RAMBUF_SECTION(0) g_uart_rambuf0[2];
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static struct uart_ram_s g_uart_ram0 =
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{
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.uart =
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{
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.xmit =
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{
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# ifdef CONFIG_RAM_UART0_SLAVE
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.buffer = g_uart_rambuf0[1].buffer,
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# else
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.buffer = g_uart_rambuf0[0].buffer,
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# endif
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.size = CONFIG_RAM_UART_BUFSIZE,
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},
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.recv =
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{
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# ifdef CONFIG_RAM_UART0_SLAVE
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.buffer = g_uart_rambuf0[0].buffer,
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# else
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.buffer = g_uart_rambuf0[1].buffer,
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# endif
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.size = CONFIG_RAM_UART_BUFSIZE,
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},
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.ops = &g_uart_ram_ops,
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.priv = &g_uart_ram0,
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},
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# ifdef CONFIG_RAM_UART0_SLAVE
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.tx = &g_uart_rambuf0[1],
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.rx = &g_uart_rambuf0[0],
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# else
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.tx = &g_uart_rambuf0[0],
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.rx = &g_uart_rambuf0[1],
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# endif
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};
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#endif
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#ifdef CONFIG_RAM_UART1
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static struct uart_rambuf_s UART_RAMBUF_SECTION(1) g_uart_rambuf1[2];
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static struct uart_ram_s g_uart_ram1 =
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{
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.uart =
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{
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.xmit =
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{
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# ifdef CONFIG_RAM_UART1_SLAVE
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.buffer = g_uart_rambuf1[1].buffer,
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# else
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.buffer = g_uart_rambuf1[0].buffer,
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# endif
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.size = CONFIG_RAM_UART_BUFSIZE,
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},
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.recv =
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{
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# ifdef CONFIG_RAM_UART1_SLAVE
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.buffer = g_uart_rambuf1[0].buffer,
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# else
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.buffer = g_uart_rambuf1[1].buffer,
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# endif
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.size = CONFIG_RAM_UART_BUFSIZE,
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},
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.ops = &g_uart_ram_ops,
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.priv = &g_uart_ram1,
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},
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# ifdef CONFIG_RAM_UART1_SLAVE
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.tx = &g_uart_rambuf1[1],
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.rx = &g_uart_rambuf1[0],
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# else
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.tx = &g_uart_rambuf1[0],
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.rx = &g_uart_rambuf1[1],
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# endif
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};
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#endif
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#ifdef CONFIG_RAM_UART2
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static struct uart_rambuf_s UART_RAMBUF_SECTION(2) g_uart_rambuf2[2];
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static struct uart_ram_s g_uart_ram2 =
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{
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.uart =
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{
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.xmit =
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{
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# ifdef CONFIG_RAM_UART2_SLAVE
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.buffer = g_uart_rambuf2[1].buffer,
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# else
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.buffer = g_uart_rambuf2[0].buffer,
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# endif
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.size = CONFIG_RAM_UART_BUFSIZE,
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},
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.recv =
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{
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# ifdef CONFIG_RAM_UART2_SLAVE
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.buffer = g_uart_rambuf2[0].buffer,
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# else
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.buffer = g_uart_rambuf2[1].buffer,
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# endif
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.size = CONFIG_RAM_UART_BUFSIZE,
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},
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.ops = &g_uart_ram_ops,
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.priv = &g_uart_ram2,
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},
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# ifdef CONFIG_RAM_UART2_SLAVE
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.tx = &g_uart_rambuf2[1],
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.rx = &g_uart_rambuf2[0],
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# else
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.tx = &g_uart_rambuf2[0],
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.rx = &g_uart_rambuf2[1],
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# endif
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: uart_rambuf_txready
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****************************************************************************/
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static size_t uart_rambuf_txready(FAR struct uart_rambuf_s *buf)
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{
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atomic_uint wroff = atomic_load(&buf->wroff);
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atomic_uint rdoff = atomic_load(&buf->rdoff);
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return rdoff > wroff ? rdoff - wroff - 1 :
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sizeof(buf->buffer) - wroff + rdoff - 1;
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}
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/****************************************************************************
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* Name: uart_rambuf_rxavailable
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****************************************************************************/
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static size_t uart_rambuf_rxavailable(FAR struct uart_rambuf_s *buf)
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{
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atomic_uint wroff = atomic_load(&buf->wroff);
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atomic_uint rdoff = atomic_load(&buf->rdoff);
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return wroff >= rdoff ? wroff - rdoff :
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sizeof(buf->buffer) - rdoff + wroff;
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}
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/****************************************************************************
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* Name: uart_ram_setup
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****************************************************************************/
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static int uart_ram_setup(FAR struct uart_dev_s *dev)
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{
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return OK;
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}
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/****************************************************************************
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* Name: uart_ram_shutdown
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****************************************************************************/
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static void uart_ram_shutdown(FAR struct uart_dev_s *dev)
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{
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}
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/****************************************************************************
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* Name: uart_ram_attach
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****************************************************************************/
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static int uart_ram_attach(FAR struct uart_dev_s *dev)
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{
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FAR struct uart_ram_s *priv = dev->priv;
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wd_start(&priv->wdog, USEC2TICK(CONFIG_RAM_UART_POLLING_INTERVAL),
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uart_ram_wdog, (wdparm_t)dev);
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return OK;
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}
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/****************************************************************************
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* Name: uart_ram_detach
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****************************************************************************/
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static void uart_ram_detach(FAR struct uart_dev_s *dev)
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{
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FAR struct uart_ram_s *priv = dev->priv;
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wd_cancel(&priv->wdog);
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}
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/****************************************************************************
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* Name: uart_ram_ioctl
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****************************************************************************/
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static int uart_ram_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
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{
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return -ENOTTY;
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}
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/****************************************************************************
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* Name: uart_ram_receive
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****************************************************************************/
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static int uart_ram_receive(FAR struct uart_dev_s *dev, FAR uint32_t *status)
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{
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FAR struct uart_ram_s *priv = dev->priv;
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atomic_uint rdoff;
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int ch;
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while (!uart_rambuf_rxavailable(priv->rx));
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rdoff = atomic_load(&priv->rx->rdoff);
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ch = priv->rx->buffer[rdoff];
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if (++rdoff >= sizeof(priv->rx->buffer))
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{
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rdoff = 0;
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}
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atomic_store(&priv->rx->rdoff, rdoff);
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*status = 0;
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return ch;
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}
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/****************************************************************************
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* Name: uart_ram_rxint
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****************************************************************************/
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static void uart_ram_rxint(FAR struct uart_dev_s *dev, bool enable)
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{
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}
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/****************************************************************************
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* Name: uart_ram_rxavailable
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****************************************************************************/
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static bool uart_ram_rxavailable(FAR struct uart_dev_s *dev)
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{
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FAR struct uart_ram_s *priv = dev->priv;
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return uart_rambuf_rxavailable(priv->rx) != 0;
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}
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/****************************************************************************
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* Name: uart_ram_dmasend
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****************************************************************************/
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static void uart_ram_dmasend(FAR struct uart_dev_s *dev)
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{
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FAR struct uart_ram_s *priv = dev->priv;
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atomic_store(&priv->tx->wroff, dev->xmit.head);
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}
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/****************************************************************************
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* Name: uart_ram_dmareceive
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****************************************************************************/
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static void uart_ram_dmareceive(FAR struct uart_dev_s *dev)
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{
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FAR struct uart_ram_s *priv = dev->priv;
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dev->dmarx.nbytes = uart_rambuf_rxavailable(priv->rx);
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uart_recvchars_done(dev);
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}
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/****************************************************************************
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* Name: uart_ram_dmarxfree
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****************************************************************************/
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static void uart_ram_dmarxfree(FAR struct uart_dev_s *dev)
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{
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FAR struct uart_ram_s *priv = dev->priv;
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/* When the dma RX buffer is free, update the read data position */
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atomic_store(&priv->rx->rdoff, dev->recv.tail);
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}
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/****************************************************************************
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* Name: uart_ram_dmatxavail
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****************************************************************************/
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static void uart_ram_dmatxavail(FAR struct uart_dev_s *dev)
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{
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if (dev->dmatx.length == 0)
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{
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uart_xmitchars_dma(dev);
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}
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}
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/****************************************************************************
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* Name: uart_ram_send
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****************************************************************************/
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static void uart_ram_send(FAR struct uart_dev_s *dev, int ch)
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{
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FAR struct uart_ram_s *priv = dev->priv;
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atomic_uint wroff;
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while (!uart_rambuf_txready(priv->tx));
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wroff = atomic_load(&priv->tx->wroff);
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priv->tx->buffer[wroff] = ch;
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if (++wroff >= sizeof(priv->tx->buffer))
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{
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wroff = 0;
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}
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atomic_store(&priv->tx->wroff, wroff);
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}
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/****************************************************************************
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* Name: uart_ram_txint
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****************************************************************************/
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static void uart_ram_txint(FAR struct uart_dev_s *dev, bool enable)
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{
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}
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/****************************************************************************
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* Name: uart_ram_txready
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****************************************************************************/
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static bool uart_ram_txready(FAR struct uart_dev_s *dev)
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{
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FAR struct uart_ram_s *priv = dev->priv;
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return uart_rambuf_txready(priv->tx) != 0;
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}
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/****************************************************************************
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* Name: uart_ram_txempty
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****************************************************************************/
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static bool uart_ram_txempty(FAR struct uart_dev_s *dev)
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{
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FAR struct uart_ram_s *priv = dev->priv;
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return uart_rambuf_rxavailable(priv->tx) == 0;
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}
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/****************************************************************************
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* Name: uart_ram_wdog
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****************************************************************************/
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static void uart_ram_wdog(wdparm_t arg)
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{
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FAR struct uart_dev_s *dev = (FAR struct uart_dev_s *)arg;
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FAR struct uart_ram_s *priv = dev->priv;
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/* When the read and write pointers of the tx buffer are same,
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* it means that the data transmission is completed
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*/
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if (dev->dmatx.length > 0 && !uart_rambuf_rxavailable(priv->tx))
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{
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dev->dmatx.nbytes = dev->dmatx.length + dev->dmatx.nlength;
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uart_xmitchars_done(dev);
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}
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/* When the read and write pointers of the rx buffer are different,
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* it means that the data is received
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*/
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if (dev->dmarx.length == 0 && uart_rambuf_rxavailable(priv->rx))
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{
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uart_recvchars_dma(dev);
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}
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wd_start(&priv->wdog, USEC2TICK(CONFIG_RAM_UART_POLLING_INTERVAL),
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uart_ram_wdog, (wdparm_t)dev);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: uart_ram_register
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****************************************************************************/
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int uart_ram_register(FAR const char *devname,
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struct uart_rambuf_s rambuf[2],
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bool slave)
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{
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FAR struct uart_ram_s *priv;
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int ret;
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priv = kmm_zalloc(sizeof(struct uart_ram_s));
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if (priv == NULL)
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{
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return -ENOMEM;
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}
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atomic_store(&rambuf[0].wroff, 0);
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atomic_store(&rambuf[0].rdoff, 0);
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atomic_store(&rambuf[1].wroff, 0);
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atomic_store(&rambuf[1].rdoff, 0);
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if (slave)
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{
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priv->tx = rambuf + 1;
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priv->rx = rambuf;
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}
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else
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{
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priv->tx = rambuf;
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priv->rx = rambuf + 1;
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}
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priv->uart.priv = priv;
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priv->uart.ops = &g_uart_ram_ops;
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priv->uart.xmit.buffer = priv->tx->buffer;
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priv->uart.recv.buffer = priv->rx->buffer;
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priv->uart.xmit.size = CONFIG_RAM_UART_BUFSIZE;
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priv->uart.recv.size = CONFIG_RAM_UART_BUFSIZE;
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ret = uart_register(devname, &priv->uart);
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if (ret < 0)
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{
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kmm_free(priv);
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}
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return ret;
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}
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/****************************************************************************
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* Name: ram_serialinit
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****************************************************************************/
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void ram_serialinit(void)
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{
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#ifdef CONFIG_RAM_UART0
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uart_register("/dev/tty0", &g_uart_ram0.uart);
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#endif
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#ifdef CONFIG_RAM_UART1
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uart_register("/dev/tty1", &g_uart_ram1.uart);
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#endif
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#ifdef CONFIG_RAM_UART2
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uart_register("/dev/tty2", &g_uart_ram2.uart);
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#endif
|
|
}
|