376 lines
10 KiB
C
376 lines
10 KiB
C
/****************************************************************************
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* arch/arm/include/armv6-m/irq.h
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*
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* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_ARMV6_M_IRQ_H
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#define __ARCH_ARM_INCLUDE_ARMV6_M_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/irq.h>
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#ifndef __ASSEMBLY__
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# include <nuttx/compiler.h>
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# include <stdint.h>
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#endif
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#include <arch/chip/chip.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* If this is a kernel build, how many nested system calls should we support? */
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#ifndef CONFIG_SYS_NNEST
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# define CONFIG_SYS_NNEST 2
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#endif
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/* IRQ Stack Frame Format ***************************************************
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*
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* The following additional registers are stored by the interrupt handling
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* logic.
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*/
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#define REG_R13 (0) /* R13 = SP at time of interrupt */
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#define REG_PRIMASK (1) /* PRIMASK */
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#define REG_R4 (2) /* R4 */
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#define REG_R5 (3) /* R5 */
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#define REG_R6 (4) /* R6 */
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#define REG_R7 (5) /* R7 */
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#define REG_R8 (6) /* R8 */
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#define REG_R9 (7) /* R9 */
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#define REG_R10 (8) /* R10 */
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#define REG_R11 (9) /* R11 */
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/* In the kernel build, we may return to either privileged or unprivileged
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* modes.
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*/
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#ifdef CONFIG_BUILD_PROTECTED
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# define REG_EXC_RETURN (10) /* EXC_RETURN */
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# define SW_XCPT_REGS (11)
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#else
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# define SW_XCPT_REGS (10)
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#endif
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/* The total number of registers saved by software */
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#define SW_XCPT_SIZE (4 * SW_XCPT_REGS)
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/* On entry into an IRQ, the hardware automatically saves the following
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* registers on the stack in this (address) order:
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*/
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#define REG_R0 (SW_XCPT_REGS+0) /* R0 */
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#define REG_R1 (SW_XCPT_REGS+1) /* R1 */
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#define REG_R2 (SW_XCPT_REGS+2) /* R2 */
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#define REG_R3 (SW_XCPT_REGS+3) /* R3 */
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#define REG_R12 (SW_XCPT_REGS+4) /* R12 */
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#define REG_R14 (SW_XCPT_REGS+5) /* R14 = LR */
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#define REG_R15 (SW_XCPT_REGS+6) /* R15 = PC */
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#define REG_XPSR (SW_XCPT_REGS+7) /* xPSR */
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#define HW_XCPT_REGS (8)
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#define HW_XCPT_SIZE (4 * HW_XCPT_REGS)
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#define XCPTCONTEXT_REGS (HW_XCPT_REGS + SW_XCPT_REGS)
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#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
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/* Alternate register names */
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#define REG_A1 REG_R0
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#define REG_A2 REG_R1
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#define REG_A3 REG_R2
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#define REG_A4 REG_R3
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#define REG_V1 REG_R4
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#define REG_V2 REG_R5
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#define REG_V3 REG_R6
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#define REG_V4 REG_R7
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#define REG_V5 REG_R8
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#define REG_V6 REG_R9
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#define REG_V7 REG_R10
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#define REG_SB REG_R9
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#define REG_SL REG_R10
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#define REG_FP REG_R11
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#define REG_IP REG_R12
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#define REG_SP REG_R13
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#define REG_LR REG_R14
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#define REG_PC REG_R15
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/* The PIC register is usually R10. It can be R9 is stack checking is enabled
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* or if the user changes it with -mpic-register on the GCC command line.
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*/
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#define REG_PIC REG_R10
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* This structure represents the return state from a system call */
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#ifdef CONFIG_LIB_SYSCALL
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struct xcpt_syscall_s
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{
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uint32_t excreturn; /* The EXC_RETURN value */
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uint32_t sysreturn; /* The return PC */
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};
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#endif
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/* The following structure is included in the TCB and defines the complete
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* state of the thread.
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*/
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struct xcptcontext
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{
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/* The following function pointer is non-zero if there
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* are pending signals to be processed.
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*/
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void *sigdeliver; /* Actual type is sig_deliver_t */
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/* These are saved copies of LR, PRIMASK, and xPSR used during
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* signal processing.
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*
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* REVISIT: Because there is only one copy of these save areas,
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* only a single signal handler can be active. This precludes
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* queuing of signal actions. As a result, signals received while
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* another signal handler is executing will be ignored!
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*/
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uint32_t saved_pc;
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uint32_t saved_primask;
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uint32_t saved_xpsr;
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#ifdef CONFIG_BUILD_PROTECTED
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uint32_t saved_lr;
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/* This is the saved address to use when returning from a user-space
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* signal handler.
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*/
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uint32_t sigreturn;
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#endif
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#ifdef CONFIG_LIB_SYSCALL
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/* The following array holds the return address and the exc_return value
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* needed to return from each nested system call.
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*/
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uint8_t nsyscalls;
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struct xcpt_syscall_s syscall[CONFIG_SYS_NNEST];
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#endif
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/* Register save area */
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uint32_t regs[XCPTCONTEXT_REGS];
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};
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#endif
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* Name: up_irq_save, up_irq_restore, and friends.
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*
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* NOTE: This function should never be called from application code and,
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* as a general rule unless you really know what you are doing, this
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* function should not be called directly from operation system code either:
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* Typically, the wrapper functions, enter_critical_section() and
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* leave_critical section(), are probably what you really want.
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*/
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/* Get/set the PRIMASK register */
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static inline uint8_t getprimask(void) inline_function;
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static inline uint8_t getprimask(void)
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{
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uint32_t primask;
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__asm__ __volatile__
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(
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"\tmrs %0, primask\n"
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: "=r" (primask)
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:
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: "memory");
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return (uint8_t)primask;
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}
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static inline void setprimask(uint32_t primask) inline_function;
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static inline void setprimask(uint32_t primask)
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{
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__asm__ __volatile__
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(
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"\tmsr primask, %0\n"
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:
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: "r" (primask)
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: "memory");
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}
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/* Disable IRQs */
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static inline void up_irq_disable(void) inline_function;
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static inline void up_irq_disable(void)
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{
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__asm__ __volatile__ ("\tcpsid i\n");
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}
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/* Save the current primask state & disable IRQs */
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static inline irqstate_t up_irq_save(void) inline_function;
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static inline irqstate_t up_irq_save(void)
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{
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unsigned short primask;
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/* Return the current value of primask register and set
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* bit 0 of the primask register to disable interrupts
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*/
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__asm__ __volatile__
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(
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"\tmrs %0, primask\n"
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"\tcpsid i\n"
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: "=r" (primask)
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:
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: "memory");
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return primask;
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}
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/* Enable IRQs */
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static inline void up_irq_enable(void) inline_function;
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static inline void up_irq_enable(void)
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{
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__asm__ __volatile__ ("\tcpsie i\n");
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}
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/* Restore saved primask state */
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static inline void up_irq_restore(irqstate_t flags) inline_function;
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static inline void up_irq_restore(irqstate_t flags)
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{
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/* If bit 0 of the primask is 0, then we need to restore
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* interrupts.
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*/
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__asm__ __volatile__
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(
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"\tmsr primask, %0\n"
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:
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: "r" (flags)
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: "memory");
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}
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/* Get/set IPSR */
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static inline uint32_t getipsr(void) inline_function;
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static inline uint32_t getipsr(void)
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{
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uint32_t ipsr;
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__asm__ __volatile__
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(
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"\tmrs %0, ipsr\n"
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: "=r" (ipsr)
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:
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: "memory");
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return ipsr;
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}
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/* Get/set CONTROL */
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static inline uint32_t getcontrol(void) inline_function;
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static inline uint32_t getcontrol(void)
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{
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uint32_t control;
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__asm__ __volatile__
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(
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"\tmrs %0, control\n"
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: "=r" (control)
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:
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: "memory");
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return control;
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}
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static inline void setcontrol(uint32_t control) inline_function;
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static inline void setcontrol(uint32_t control)
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{
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__asm__ __volatile__
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(
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"\tmsr control, %0\n"
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:
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: "r" (control)
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: "memory");
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}
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#endif /* __ASSEMBLY__ */
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_ARMV6_M_IRQ_H */
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