9998f85110
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2359 42af7a65-404d-4744-a932-0658087f49c3
100 lines
4.8 KiB
C
100 lines
4.8 KiB
C
/************************************************************************************
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* arch/arm/src/stm32/stm32_pwr.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_PWR_H
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#define __ARCH_ARM_SRC_STM32_STM32_PWR_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Register Offsets *****************************************************************/
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#define STM32_PWR_CR_OFFSET 000x00 /* Power control register */
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#define STM32_PWR_CSR_OFFSET 0x0004 /* Power control/status register */
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/* Register Addresses ***************************************************************/
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/* Register Bitfield Definitions ****************************************************/
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/* Power control register */
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#define PWR_CR_LPDS (1 << 0) /* Bit 0: Low-Power Deepsleep */
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#define PWR_CR_PDDS (1 << 1) /* Bit 1: Power Down Deepsleep */
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#define PWR_CR_CWUF (1 << 2) /* Bit 2: Clear Wakeup Flag */
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#define PWR_CR_CSBF (1 << 3) /* Bit 3: Clear Standby Flag */
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#define PWR_CR_PVDE (1 << 4) /* Bit 4: Power Voltage Detector Enable */
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#define PWR_CR_PLS_SHIFT (5) /* Bits 7-5: PVD Level Selection */
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#define PWR_CR_PLS_MASK (7 << PWR_CR_PLS_SHIFT)
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# define PWR_CR_2p2V (0 << PWR_CR_PLS_SHIFT) /* 000: 2.2V */
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# define PWR_CR_2p3V (1 << PWR_CR_PLS_SHIFT) /* 001: 2.3V */
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# define PWR_CR_2p4V (2 << PWR_CR_PLS_SHIFT) /* 010: 2.4V */
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# define PWR_CR_2p5V (3 << PWR_CR_PLS_SHIFT) /* 011: 2.5V */
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# define PWR_CR_2p6V (4 << PWR_CR_PLS_SHIFT) /* 100: 2.6V */
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# define PWR_CR_2p7V (5 << PWR_CR_PLS_SHIFT) /* 101: 2.7V */
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# define PWR_CR_2p8V (6 << PWR_CR_PLS_SHIFT) /* 110: 2.8V */
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# define PWR_CR_2p9V (7 << PWR_CR_PLS_SHIFT) /* 111: 2.9V */
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#define PWR_CR_DBP (1 << 8) /* Bit 8: Disable Backup Domain write protection */
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/* Power control/status register */
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#define PWR_CSR_WUF (1 << 0) /* Bit 0: Wakeup Flag */
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#define PWR_CSR_SBF (1 << 1) /* Bit 1: Standby Flag */
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#define PWR_CSR_PVDO (1 << 2) /* Bit 2: PVD Output */
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#define PWR_CSR_EWUP (1 << 8) /* Bit 8: Enable WKUP pin */
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_STM32_STM32_PWR_H */
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